Implementation of 4-bit DAC converter using R-2R resistor ladder

Response to question 1:
The simple R-2R resistor ladder implementation of 4-bit DAC converter is the following.
The expression of the output voltage V0 is given by,
V 0= Vref
2N ∑
i=0
n−1
2i di(1+ Rf
R 1 )
Here, N = 4 (as the digital input is 4-bit)
Vref = 4.8 volts (given)
Rf = 0 Ω (as no resistance is connected in the negative feedback of the op-amp)
R1 = 20 k (the resistance connected to ground)
d0 = [A] = (1010)2 = (10)10.
d1 = [B] = (1011)2 = (11)10.
d2 = [C] = (1100)2 = (12)10.
d3 = [D] = (1101)2 = (13)10.
Hence, V 0= 4.8
( 24 ) ( 1+ 0
20 k ) ( ( 20∗10+21∗11+ 22∗12+23∗13 ) )

= ( 4.8
16 ) ( 10+ 22+ 48+104 ) = 55.2 Volts.
Hence, the analogous output V0 of the circuit for the given digital inputs is 55.2 volts.
Response to question 2:
Given the corner frequency or the cut-off frequency of the low pass filter is 10 kHz. The filter
allows all the signals below this corner frequency. Hence, the minimum input impedance
frequency is 10 kHz.
Now, the particular filter is the Second-Order Twofold-Gain Sallen-Key Low-Pass Filter.
The input impedance in s-domain of the filter is given by,
Z ( s )
R 1 = s2 C 1 C 2 R 1 R 2+ sC 1 R 2+1
s2 R 1 R 2C 1 C 2
Given that R1 = R2=R and C1 = C2=R.
Hence, the equation of the input impedance becomes,
Z ( s )
R = s2 C2 R2 + sCR+1
s2 R2 C2

Now, it is given that the minimum input impedance of the filter is 20 kΩ.
Or, 20 = (1+ω2)C2 R2 + √ 1+ ω2 CR+1
(1+ω2) R2 C2
Here, ω = 10 kHz
Or, 20 = (1+102 )C2 R2+ √ 1+102 CR+1
(1+102)R2 C2
Or, 20*101R2 C2 = 101 C2 R2+ √1 01CR+1 (1)
Now, for a given value of R the value of C can be determined from equation (1).
Response to question 1:
The two-diode model of an NPN transistor is given below.