The Arithmetic Logic Unit (pdf)

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(A CHARTERED UNIVERSITY)
COMP 300
Spring 2021
MID EXAM 01

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Introduction
In this exam, we were asked to design a data path. Data path is basically the part of the
central processing unit (CPU) that does the actual computations. It is the logic to process
the input data and generate the correct output data. So, to Design this data path there
were few instructions that we have to follow. We were asked to design it with help of help
of Register file with the count of 4 register in it, Main Memory with the width of 4 bits and
with 16 distinct locations (with total 64 binary cells) and lastly The Arithmetic Logic Unit
which in our case was of 4 bits and with 4 bit operation code. Further we were asked to
design most of components from scratch yet we were allowed to use the basic tools from
the logisim tool box.
So, the First component that I design was the Register file.
1. Register File.
A simple register file is a set of registers and a decoder. The register file requires
an address and a data input to operate. The register mentioned in the above line
is defined as “ The processor includes some internal memory storage location,
which are called registers these memory storage locations are used to speed up
the processor operations.” To design register file there were instructions to use
only 4 registers in the register file. And also the register file will be able to store 4
bit unsigned numeric value. So I designed the Register file with 4 registers which
accepts the 4 bit data. I also used decoder to select any specific register for writing
data. To get the output from registers is used Mux in this case I used two Mux with
two bit select line each.
 Screen shot of Register File

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2. Main memory.
The main memory in a computer is called Random Access Memory. It is also
known as RAM. RAM is one of the faster types of memory, and has the capacity
to allow data to be read and written. In this exam we are asked to design main
memory / RAM of 4 bit width and 16 distinct locations. I designed it with the help
of Binary cell, Decoder and OR Gates. The binary cell is an elementary unit of
computer storage that can have one or the other of two stable states and can thus
store one bit of information. the basic structure of the binary cell is pated below.
 Screen shot of Binary Cell
To designed a main memory with 16 distinct locations, I needed 64 such binary
cells, a 4 to 16 decoder and 4 OR gates picture for the main memory is on the
next page.
- On next page

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 Screen shot of Main memory

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3. The Arithmetic Logic Unit
An Arithmetic logic unit (ALU) is a combinational digital circuit that
performs arithmetic and bitwise operations on integer binary numbers. In this
exam we were asked to design a simple 4bit ALU. So we needed to design it from
very scratch. We already knew that it is combination of two units Arithmetic and
Logic unit. So first part that we designed was the arithmetic, Out of which the first
circuit that was designed was of 4bit adder / subtract. The purpose of this circuit
was to add and subtract.
 Screen shot of 4 bit Adder / Subtract
- On next page

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In the next cycle further circuitry was added at the y input of 4 bit adder and subtraction
to enhance it functionality and collectively it was given the name of 4 bit Arithmetic unit.
 Screen shot of 4 bit Arithmetic Unit
To design the other chunk of ALU which we Know as logical unit. Basically, Bit wise
operators were incorporated in its design for this specific circuit we used 4 MUX (4 x1)
and also 16 gates or bit wise operators were used produce more operations. After the
logical and Arithmetic units are designed then we need to merge and also use the
multiplexers which will decide on the basis of operation code which answer of the
calculation should be shown on the output pins.

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 Screen shot of 4 Bit Logic Unit

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 Screen shot of Quad Mux 2 x1
The Quad Mux is designed to control the output of both logic unit and arithmetic unit. It
will decide on the basis of operation code input which answer or output should be
displayed on the final output.

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Following is the complete circuit of Arithmetic Logic Unit, which is comprised of multiple
other circuits which includes, 4 bit add/subtract, 4 bit Arithmetic unit, 4 bit logic unit and
Quad 2x1 MUX.
 Screen shot of Arithmetic Logic Unit
As we have completed all three different circuits. It time to merge all the parts into one
data path. After these circuit are joined together now we can read, store, and compute
the data in between these three elements of the circuit.

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After successfully designing the data path with the help of Register file, ALU and Main
memory. I tested it with simple programs that were written in RTL. My programs did
include basic operations on registers and memory data.
Program 1 :
R2  R3 + R1
M [ R0 ]  R2
Detailed Description for RTL program Run.
The very First thing that I did was I initially stored two value of R3 (0110) and R1 (0001)
in the registers. For that, I gave the register address instruction through address input
(11) and (01) respectively on my circuit. I also kept the Read Write to 1. While I was writing
values, I made sure that my mux enable bit is off. After successfully writing the values in
the Register file. I gave the register address input instructions on input AA (11) and BA
(01) to send that data to ALU for the Processing. After that I gave the operation code of
Addition to ALU which was (0010) for addition and the Result of the addition was clearly
visible on the output nob before Mux. I placed that nob to check If we are getting the
desired results. The values and the instructions that we gave to the Register file and ALU
should have resulted in the following 0110 + 0001 = 0111 and that’s what exactly i got. I
have attached the picture of this process bellow.

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Now After this basic step the next task was to store the same result in R2 for that the
address was (10) in binary so, this was the first step. I changed the address input to (10)
and made the read write line active by placing 1 instead of zero. After that, the next step
was to shift the enable bit of MUX to (1) from zero and the select bit to zero. As that is the
only case when the MUX reads from the ALU. After completing these steps. Our value
was in the Register R2. I have attached the screen Shot of this whole process below.
In the above picture, it is clearly visible that we successfully calculated the value from R3
and R1 and also stored it in the register R2. Now our next goal was to store the same
value to our memory at R0. So for Writing in the memory we have to access address from
AA (0000) data from BB (0111) and we also have to enable the clock/voltage nob and
also we have to put W Read Write to (1), To read the results / output of memory we also
have to change MUX select bit to (1). So, With these steps we achieved our goal of writing
to the memory and retrieving form it. I have pasted screen shot of it on the next page.

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Test Run
Program 2 :
R2  M [ R0 ]
R3  R2 + R1
M [ R1 ]  R3
So, Earlier in the first run we were successful in writing a value to R0 of main memory
whose binary equivalent was (0111) which was a result that we produced by adding
(0110) and (0001) with the help of ALU. This time we are accessing M [R0] storing it in
R2 and then computing R2 and R1 (value available in register file from the last test run)
and storing that value to R3 and then writing the same value of R3 to M [R1]. The point
here is that ALU only operates on registers, so the main memory contents must first be
loaded into a register, and then saved back to main memory. For this problem Firstly, I
accessed the value from main memory by changing Mux select bit from (0) to (1) and by
giving the memory address stored in R0 to memory. (visible in the last screen shot). Then
I stored the same value in R2 of register file. By switching read write of register file to (1)
and changing the address of that to (10) and then clicked the clock it loaded the value to
the exact location. The next step was to access values of R2 and R1 and further send
them to ALU for further processing with the help specific operation codes. For that, I set
the AA value to (10) and BA (01). After that corresponding value were loaded to ALU and

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then the operation code for addition (0010) was provided to ALU circuitry. Screen shot
for the steps elaborated above is pasted below.
The next step after this is to store the same value which we received from ALU after
adding the values of R2 (0111) and R1 (0001) to store the result which is (1000) in R3.
For that first of all we have to make the read/ write of Register file active so that we can
write the data in registers after this we have to select the desired register in which we
want to write this new value in our case it will be R3 which is (11) in binary. After placing
this input on Register File address we only have to press clock once and the new
calculated value will be stored in the R3 (11). And with that we will have only one step left
which will be of writing this value to memory on the address stored in R1 of the register
file. For that we will make our Address A(AA) and Address B (BA) active. Our AA part will
provide us the address where we have to store new value in memory and BB part will
provide us data that we to write in memory. So, for our case we will place R0(00) on AA
and R3(11) on BA. The next thing that we have to take care of is we have to make
read/write active of main memory and the clock or +5v (in my case). So, With this process
I successfully stored the new value (1000) to memory location (1) of the Main Memory.
The implementation this whole process is shown on the next page with the help of screen
shot.

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In this manner I was able to complete two RTL program runs, Programs that I solved did
include some basic operations on registers and memory data including ALU. And I also
explained on how I stored and retrieved data to and from the memory I also wrote the
control signals that I was using during the program run.

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The following were the components that I used in the making of these circuits above.
- Decoder
- Register
- Multiplexers
- Data Input pins
- Data Output pins
- Probes
- Button
- Splitters
- Not Gate
- And Gate
- OR Gate
- XOR Gate
- SR Flip Flop
- Adder