The Arithmetic Logic Unit (pdf)
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Added on 2021-07-07
The Arithmetic Logic Unit (pdf)
Added on 2021-07-07
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pg. 1(A CHARTERED UNIVERSITY) COMP 300 Spring 2021 MID EXAM 01
pg. 2
pg. 3Introduction In this exam, we were asked to design a data path. Data path is basically the part of the central processing unit (CPU) that does the actual computations. It is the logic to process the input data and generate the correct output data. So, to Design this data path there were few instructions that we have to follow. We were asked to design it with help of help of Register file with the count of 4 register in it, Main Memory with the width of 4 bits and with 16 distinct locations (with total 64 binary cells) and lastly The Arithmetic Logic Unit which in our case was of 4 bits and with 4 bit operation code. Further we were asked to design most of components from scratch yet we were allowed to use the basic tools from the logisim tool box. So, the First component that I design was the Register file. 1.Register File.A simple register file is a set of registers and a decoder. The register file requiresan address and a data input to operate. The register mentioned in the above lineis defined as “ The processor includes some internal memory storage location,which are called registers these memory storage locations are used to speed upthe processor operations.” To design register file there were instructions to useonly 4 registers in the register file. And also the register file will be able to store 4bit unsigned numeric value. So I designed the Register file with 4 registers whichaccepts the 4 bit data. I also used decoder to select any specific register for writingdata. To get the output from registers is used Mux in this case I used two Mux withtwo bit select line each.Screen shot of Register File
pg. 42.Main memory.The main memory in a computer is called Random Access Memory. It is alsoknown as RAM. RAM is one of the faster types of memory, and has the capacityto allow data to be read and written. In this exam we are asked to design mainmemory / RAM of 4 bit width and 16 distinct locations. I designed it with the helpof Binary cell, Decoder and OR Gates. The binary cell is an elementary unit ofcomputer storage that can have one or the other of two stable states and can thusstore one bit of information. the basic structure of the binary cell is pated below.Screen shot of Binary CellTo designed a main memory with 16 distinct locations, I needed 64 such binary cells, a 4 to 16 decoder and 4 OR gates picture for the main memory is on the next page. -On next page
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