Assignment on CISC and RISC Architecture - Desklib

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Added on 2020-04-07

Assignment on CISC and RISC Architecture - Desklib

Added on 2020-04-07

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Running head: CISC and RISC ArchitectureCISC and RISC ArchitectureNameAffiliate institution

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Running head: CISC and RISC ArchitectureTable of ContentsRISC and CISC Architectures........................................................................................................................3Introduction.............................................................................................................................................3Computer Instruction Set Computer (CISC) Architecture:.......................................................................4Reduced Instruction Set Computer (RISC)Architecture...........................................................................5Advantages of CISC Architecture.............................................................................................................6Advantages of RISC Architecture.............................................................................................................7Conclusion...............................................................................................................................................7Recommendation....................................................................................................................................7References...................................................................................................................................................8

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Running head: CISC and RISC ArchitectureRISC and CISC ArchitecturesIntroduction Every processor is developed with the capabilities to implement a set of rules for executing a definite set ofbasic functions. Instruction set design is the processor element which is required for creation of machinelevel application programs to carry out any logical or mathematical operations.The instruction set is fixed in the hardware which acts as a connection between hardware and software. Acompiler translates high level language to machine language.If several complex commands are increased within the instruction set of the CPU, the processor operationsbecome slow and consumes a lot of time.[ CITATION Lyl10 \l 1033 ]There are two known types of structures based on the instruction set, these are Computer Instruction SetComputer (CISC) and Reduced Instruction Set Computer (RISC). Computer Instruction Set Computer (CISC) Architecture:The compiler changes high level language instructions to low level language instructions, prior to executionof the instructions by the processor. Compilers had to change complex code into long series of machine

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Assignment on CISC and RISC Architecture - Desklib