Computer Architectures and Principles

This document discusses the principles and architectures of computer systems. It compares the Intel core i7 - 4960X Processor and AMD PHENOM II X6 1100T. It also provides an overview of the MARIE computer model.

Computer Architectures and Principles
PROGRAMMING
Computer Architectures and Principles
Name of the Student
Name of the University
Author note

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Computer Architectures and Principles
Table of Content
Introduction:...............................................................................................................................3
Methodology:.............................................................................................................................4
Von Neumann Architecture.......................................................................................................6
Intel core i7 - 4960X Processor..................................................................................................8
AMD PHENOM II X6 1100T....................................................................................................8
COMPARISION OF PARAMETERS and FEATURES...........................................................9
MARIE.....................................................................................................................................11
An Introduction....................................................................................................................11
Architecture..........................................................................................................................11
BASIC INSTRUCTIONS - MARIE...................................................................................13
Programming........................................................................................................................13
Algorithm.................................................................................................................................18
Conclusion:..............................................................................................................................23
References................................................................................................................................25

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Computer Architectures and Principles
Introduction:
In this task, we are required to choose 2 contemporary commercial computer systems and
study them in detail.
In case of multi - core processors, there is a problem of power dissipation. This is due to the
use of more than 1 core. Another problem is to make a choice between the core type -
homogeneous core or heterogeneous core. We have considered 2 processors which are multi-
core processor machines for comparison. They are the Intel core i7 - 4960X processor and the
AMD Phenom II X6 processor. These have certain similarities to the von Neumann
Architecture. We have analysed and compared the design of these 2 computer systems. Our
main focus is on the performance metrics, costing, security, usability as well as energy
consumed of the 2 given processors ( as per Prinslow G. (2011)). We have also made a
prediction about the future trends in the designing of the processors based on the peer –
reviewed research findings.

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Computer Architectures and Principles
Methodology:
If we have to measure the performance metrics of any processor, we can use various
parameters. They are : the throughput ( the average rate of the number of processes executed
successfully ), the response time, execution time, energy consumed and the bandwidth of the
memory ( the rate at which data is available from the core of the CPU to the RAM ). We
consider a system better, if it has a higher throughput, smaller execution time and moderate
power consumption.
If we have to make use of a multi - core processor fully, then we have to make use of
parallelism. We must have a feature to execute the programs parallely. There are various
types of parallelism. The 3 types are : Instruction level parallelism, thread level parallelism
and data level parallelism.
In instruction level parallelism, we can execute the instructions in a parallel manner or we can
execute them in a sequential manner. In thread level parallelism, we can present multiple
threads of a task to the processor which can be executed at the same time. In data level
parallelism, we use the concept of memory coherence to share any common data between the
processes being executed.

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Computer Architectures and Principles
As per Jeffers J, Reinders J, Sodani A (2016), the study which includes the real world code
examples which showcase the use of the particular features of the new largely parallel and
good performance computation product has been conducted.
If we use the concept of single threading, the execution time is the sum of time taken to
complete each task individually. If we use the concept of thread level parallelism, the
execution time is maximum value of all the individual task’s time taken.
As per Herdrich, A., Verplanke, E., Autee, P., Illikkal, R., Gianos, C., Singhal, R., & Iyer, R.
(2016), during the last 10 years, addressing the quality of service (QoS) in multi-core server
platforms is a fastly growing research topic.
As per Sodani, A., Gramunt, R., Corbal, J., Kim, H.-S., Vinod, K., Chinthamani, S., Liu, Y.-
C. (2016), the Knights Landing Processor is targeting the good performance of computing
and the parallel workload. It gives a far better performance as well as bandwidth of memory
as compared to the earlier generations.

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Computer Architectures and Principles
Von Neumann Architecture
The model is also called as the Princeton architecture. The various components present in the
architecture are : the processing unit which contains the ALU (Arithmetie Logic Unit) and the
processor registers, the control unit which contains an instruction register and a program
counter, the memory to store data and instructions, there is external mass storage and the
input and output of procedures. In this type of model, the instruction fetch and any data
operation does not occur at the same time as they share the common bus. This leads to an
effect on the performance of the system. The program instructions as well as the data are kept
in RAM (Random Access Memory).
The Von Neumann architecture has a shared bus for the program memory and data memory.
This leads to slower data transfer rate between the memory and the CPU (Central processing
unit). It is because we have only 1 bus and we cannot access two classes of the memory at a
single time. This lowers the throughput. It does not allow the CPU to reach its maximum rate.
The speed of processing the data becomes slower due to this. The performance of Von
Neumann architecture can be enhanced by some methods. They are: provision of a cache
between the CPU and the main memory, to provide separate caches as well as separate access
paths for data and instruction, by the use of branch predictor algorithm and the logic, to
provide limited CPU stack and scratch pad memory to decrease the access of memory, to
implement the CPU and memory hierarchy which helps in decreasing the latency and
enhancing the throughput between the processor registers and main memory. We solve this
by using the concept of parallel computing. The researches show that an increase in the

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Computer Architectures and Principles
number of instruction streams which are simultaneous ( using multi threading or multi
processing of single chip) makes the problem worse. So, we need additional overhead for the
maintenance of cache coherence between the processors and threads.

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Computer Architectures and Principles
Intel core i7 - 4960X Processor
The Intel core i7 - 4960X Processor was introduced on September 10, 2013 and is used with
various desktop as well as laptop 64 bit X86-64 processors which use Ivy Bridge, Sandy
Bridge, Westmere, Nehalem and Haswell micro architecture. The Intel core i7 - 4960X
Processor ( Ivy Bridge E ) is a latest Core i7 model of Intel. It has various features which are
described as follows : It has 6 cores, 12 threads, a clock speed of 3.6 GHz, the maximum
turbo frequency of 4 GHz. It has 3 level cache. Level 1 cache which has 32 KB for code and
32 KB for data is available per code. Level 2 cache is of 256 KB and level 3 cache is of
15360 KB which is shared for all cores. The instruction set is of 64 bits length. It has a
thermal design power (TDP) of 130 W. The maximum temperature is 66.8 degree C. It has a
die size of 22nm and it supports 4 memory channels.
AMD PHENOM II X6 1100T
It is one of the latest AMD Phenom processor that is available in the market. It has various
features which are described below. It has a total of 6 cores, 6 threads, a clock speed 3.3GHz
and the maximum turbo frequency of 3.7 GHz. The level 1 cache which has 64 KB for code
and 64 KB for data is available per code. Level 2 cache is of 512 KB and level 3 cache is of
6144 KB which is shared for all cores. The instruction set is of 64 bits length. It has a thermal
design power (TDP) of 125 W. The maximum temperature is 62 degree C. It has a die size of
45 nm and it supports 2 memory channels.
It is a multi-core processor of 45nm.The version AM2 + of phenom II was released in
December 2008 but the triple and the quad core processor were released in February 2009.

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Computer Architectures and Principles
COMPARISION OF PARAMETERS and FEATURES
Firstly we see a comparison which is based on the power dissipation. In the AMD Phenom II
X6 processor, the thermal design power is 125 W and in the Intel core i7 - 4960X processor,
the thermal design power is 130 W. Hence , we see that the AMD Phenom II X6 processor
will save 4% energy as compared to the Intel core i7 - 4960X processor.
Another parameter used to compare the 2 processors is based on the concept of Hyper-
Threading . The Intel core i7 - 4960X processor support the Hyper-Threading technology and
the AMD Phenom II X6 processor does not support the Hyper-Threading technology. Hence,
we see that the Intel processor is able to execute double number of threads as compared to the
AMD Phenom II X6 processor.
Next parameter used for the comparison is the operating frequency. The Intel core i7 - 4960X
processor has a higher frequency than the AMD Phenom II X6 processor. Hence, it executes
more number of operations per minute.
The number of cores or threads in the AMD Phenom II X6 processor is 6 and that in the Intel
core i7 - 4960X processor is 12. Out of 12, 6 threads are provided by Hyper-Threading
technology which are the additional threads. The operating frequency in case of the AMD
Phenom II X6 processor is 3.7 GHz and for Intel processor it is 4GHz. Hence, Intel processor
is faster. Another parameter is on the basis of AES encryption and decryption. The Intel core
i7 - 4960X processor uses AES (Advanced Encryption Standard) technology. It is helpful in
running the programs and helps to protect the disk or the network data. If we compare the
cache memory size, the AMD Phenom II X6 processor has on chip L2 and L3 cache of 9 MB
and the Intel core i7 - 4960X processor has 16.5 MB. So, the Intel core i7 - 4960X processor

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Computer Architectures and Principles
is better in this manner. Another parameter which can be used for comparison is on the basis
of cache memory classification. The Intel core i7 - 4960X processor has an inclusive cache
whereas the AMD Phenom II X6 processor has an exclusive cache. In case of inclusive
cache, the data that is stored in the individual L1 and L2 cache exists as a duplicate data. This
will help to enhance the inter – core communication process.
The memory controller may also be used to compare any 2 processors. In Intel processor, we
use integrated memory’s controller. This enables us to fetch the main memory faster.
The applications which show positive results with a GPU always show good results with an
Intel processor. The Intel Processor has the features of vectorization and bandwidth. It shows
a support for the applications which can’t be run on the GPUs according to Chrysos, G
( 2012 ).

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Computer Architectures and Principles
MARIE
An Introduction
MARIE is a computer model that contains the memory which can store the data and also a
processor which contains an ALU and various registers. MARIE stands for Machine
Architecture that is Really Intuitive and Easy. The various features of MARIE’s model are : a
main memory of 4 kB ( we use 12 bits for every address), the data is of 16 bits, instructions
are of 16 bit ( with operation code of 4 bits and address of 12 bits), 16 bit AC, 16 bit
instruction register ( IR ), 16 bit memory buffer register ( MBR), 12 bit instruction counter
(PC), 12 bit memory address register ( MAR ), 8 bit input register ( InREG) and 8 bit output
register(OutREG).
Architecture
Courtesy : Null, L., Lobur, J. (2003)

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Computer Architectures and Principles
Courtesy : Null, L., Lobur, J. (2003)
Courtesy : Null, L., Lobur, J. (2003)

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Computer Architectures and Principles
BASIC INSTRUCTIONS - MARIE
There is a specific format for a MARIE instruction. It consists of a total of 16 bits ,i.e., Bit 0
to Bit 15. The bits 0 to 11 contain the address and the bits 12 to 15 contain the address in an
instruction. The various instructions used in MARIE are as follows :
1) LOAD X - It can load the value of an address X into the accumulator, AC.
2) STORE X - It is used to store the value of the accumulator, AC at the address X.
3) ADD X - It is used to add the value of an address X with the accumulator AC.
4) SUBT X - It is used to subtract the value of an address X from the accumulator AC.
5) INPUT - It is used to get a value as an input from the input device into the accumulator,
AC.
6) OUTPUT - It is used to send the value present in the accumulator AC to the display as an
output.
7) HALT - It is used for the termination of the program.
8) SKIPCOND - It is used to skip the instruction present next based on the condition
mentioned.
9) JUMPX - It is used to load the value stored in X into the PC.
Let us explain these instructions in a better manner by taking an example.
Programming
In the Marie Simulator, we can open the MARIE Assembler Code Editor and write the code
and then assemble it.

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Computer Architectures and Principles
Figure. MARIE Simulator
Suppose, we have to calculate the following expression :
Ans = a + b - c
Here, a = 100, b = 200 , c = 50 ( in decimal number system ). We have stored these variables
in the memory. We also store the value of ans in the memory. We print the value of ans on
the display. At last, we terminate the program.
LOAD a // it loads the value of ‘a’ in AC
ADD b // it adds the value of ‘b’ in AC and stores the value in AC
SUBT c // it subtracts the value of c from AC and stores the value in AC
STORE ans // It stores the value of AC in the variable ans
OUTPUT // It displays the result of AC on display

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Computer Architectures and Principles
HALT // It terminates the program
A, DEC 100 // It declares the variable ‘a’ with decimal value of 100
B, DEC 200 // It declares the variable ‘b’ with decimal value of 200
C, DEC 50 // It declares the variable ‘c’ with decimal value of 50
ans, DEC 0 // It declares the variable ‘ans’ with decimal value of 0
We take the example of a simple program:
In Marie Simulator, we can open MARIE Assembler Code Editor and write the code and then
assemble it.
ORG 100
LOAD a
ADD b
STORE c
HALT
. a, DEC 35
. b, DEC -23
. c, Hex 0
We load the program and then run it. We can also run it step by step and we can also set a
delay.
We get the output as 000C.

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Computer Architectures and Principles
Another program which is capable of subtracting 2 numbers is given below :
/subt.mas
ORG 100
Load n1
SUBT n2
STORE res
HALT
N1, DEC 10
N2, dec 8
Res, DEC 0
The final result obtained is 0002.
Next, we consider a program which is capable of carrying out the input and output functions.
/InOutOperation.mas
ORG 100
INPUT
OUTPUT
HALT
The input value is sent to AC. The output is sent to the output register. If input is 5, then AC
shows 5 and output register also shows 5 on running the code.
Function:

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Computer Architectures and Principles
/ This program presents a simple addition(p, q) function.
ORG 0
LOAD A
STORE p / Sets the argument `p` for the addition function.
LOAD B
STORE q / Sets the argument `q` for the addition function.
JNS addition / Calls the addition function using JNS which stores the current PC to be used
as a callback
OUTPUT / Indirectly jumps back to where the function was called from.
HALT
p, DEC 0
q, DEC 0
addition, HEX 0
LOAD p
ADD q
JUMPI addition
A, DEC 1 / Variables
B, DEC 2

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Computer Architectures and Principles
Algorithm
We have chosen an instruction set and we have implemented the algorithm using an assembly
language which is based on our chosen instruction set. The algorithm includes a loop, a
branch instruction, a subroutine call and arithmetic and logical operations. For some of the
instructions, we can provide the machine code.
Algorithm for Fibonacci Series
Step 1 : Start
Step 2 : Declare the variables i, n, p, q, s
Step 3 : Initialize p = 0, q = 1, and s = 0.
Step 4 : Input the number to be printed.
Step 5 : Print first 2 terms as p and q.
Step 6 : Initialize I = 2.
Step 7 : If I > n, go to step 10
Step 8 : s = p + q, p = q, q = s, I = I + 1
Step 9 : Print the value of s and go to Step 7.
Step 10 : Stop
ASSEMBLY

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Computer Architectures and Principles
LANGUAGE
PROGRAM:
Program
ORG 0
Cond, LOAD n / Load count into AC
SUBT A10 / Remove 10 from
count
SKIPCOND 000 / Skipcond 000 if AC
< 0
JUMP End / End Loop
Loop, LOAD n / Load count into AC
ADD ONE / Increment Count by 1
STORE n / Store AC in count
JNS Fibbonacci
JUMP Cond / Check loop
conditions
Fibbonacci, HEX 000 / Store value
for JNS
CLEAR / AC = 0

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Computer Architectures and Principles
/ S = P + Q
ADD P / AC + P
ADD Q / AC + Q
STORE S / S = AC
/ P = Q
LOAD Q / AC = Q
STORE P / P = AC
/ Q = S
LOAD S / AC = S
STORE Q / Q = AC
/ Fast Output
LOAD S / AC = S
OUTPUT / Output AC
JUMPI Fibbonacci
End1, HALT / Halt process

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Computer Architectures and Principles
/ variable values
N, HEX 0 / counting of the loop
S, HEX 0
P, HEX 0
Q, HEX 1
/ constant values
A0 , HEX 0
A1 , HEX 1
A2 , HEX 2
A3 , HEX 3
A4 , HEX 4
A5 , HEX 5
A6 , HEX 6
A7 , HEX 7
A8 , HEX 8
A9 , HEX 9
A10 , HEX 10
Let us try to understand the algorithm better by taking an example. Let us assume that the
value of n is 5.
Hence, p = 0 and q = 1 and s = 0
First 2 terms are printed as p and q , i.e., 0 and 1.

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Computer Architectures and Principles
Then, I = 2 and if I > n, we stop the program.
But, if I < = n, which is true in this case, we get s = p + q = 0 + 1 = 1, p = q = 1, b = s = 1 , I =
3.
Then value of s is printed as 1.
Again, if I < = n, which is true in this case ( 3 < = 5), we get s = p + q = 1 + 1 = 2, p = q = 1,
q = s = 2 , I = 4.
Then value of s is printed as 2.
Again, if I < = n, which is true in this case ( 4 < = 5), we get s = p + q = 1 + 2 = 3, p = q = 2,
q = s = 3 , I = 5.
Then value of s is printed as 3.
Again, if I < = n, which is true in this case ( 5 < = 5), we get s = p + q = 2 + 3 = 5, p = q = 3,
q = s = 5 , I = 6.
In next iteration, we see that I > n (as 6 > 5). Hence, the program stops.
Then value of s is printed as 3.

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Computer Architectures and Principles
Conclusion:
Therefore, we have chosen 2 contemporary commercial computer systems and studied them
in detail. We have seen that in case of multi - core processors, there was a problem of power
dissipation due to the use of more than 1 core according to M. Rouse (2013). We considered
2 processors which are multi-core processor machines for comparison purpose. They are the
Intel core i7 - 4960X processor as well as the AMD Phenom II X6 processor. These have
certain similarities to the von Neumann Architecture which we have discussed. We have
analysed and compared the design of these 2 computer systems. We have compared them on
the basis of performance, cost, security, usability and energy consumed by the processors.
We have also made a prediction about the future trends in the design of the processors of
computer systems based on the peer – reviewed research findings. We have seen how the
parallel processing is supported in the structures.
We have made use of various parameters to compare the 2 processors. We find that AMD is
better as compared to Intel processor if we consider memory’s size and the cost. The Intel
processor is better as compared to AMD processor if we consider power dissipation, concept

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Computer Architectures and Principles
of Hyper-threading, die size, operating frequency, AES encryption and HEXryption and
cache memory size. If we consider all the parameters, we would prefer Intel processor to the
AMD processor, if we need high performance. Hence, we can conclude that the choice
between the 2 depends on the type of application that we are using the processor for.
The MARIE architecture is discussed and the Instruction Set is studied in detail. The
instruction set has been explained with the help of small programs used for the addition,
subtraction, input and output. Finally we have built an algorithm for Fibonacci Series and
written a code in the assembly language. The code is run on the MARIE Simulator and the
results obtained. The algorithm for the Fibonacci series contains a loop, conditional
statements, the concept of functions and the mathematical and logical operations. Hence, our
condition is satisfied.
Therefore, we have covered all the sections required and find the MARIE simulator very
helpful. Considering the future aspect, we find that the processors with specific requirement
fulfillment will be more prevalent with multiple cores and parallel processing.

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Computer Architectures and Principles
References
Null, L., Lobur, J. (2003). MarieSim. Journal on Educational Resources in Computing, 3(2),
1–29.doi:10.1145/982753.982754
Herdrich, A., Verplanke, E., Autee, P., Illikkal, R., Gianos, C., Singhal, R., & Iyer, R.
(2016). Cache QoS: From concept to reality in the Intel® Xeon® processor E5-2600 v3
product family. IEEE International Symposium on High Performance Computer
Architecture (HPCA).doi:10.1109/hpca.2016.7446102
Sodani, A., Gramunt, R., Corbal, J., Kim, H.-S., Vinod, K., Chinthamani, S., Liu, Y.-C.
(2016). Knights Landing: Second-Generation Intel Xeon Phi Product. IEEE Micro, 36(2),
34–46.doi:10.1109/mm.2016.25
Jeffers J, Reinders J, Sodani A (2016) Intel Xeon Phi processor high performance
programming: knights, landing edn. Morgan Kaufmann, Burlington
Chrysos, G. ( 2012 ), Intel Xeon Phi X100 Family Coprocessor— The Architecture, white
paper, Intel,.
B. Kuttanna (2013), Technology Insight: Intel Silvermont Microarchitecture, Intel.
Intel Architecture Instruction Set Extensions Programming, Reference, no. 319433- 023,
Intel, Aug. 2015.
An Introduction to the Intel QuickPath Interconnect, (2009) white paper, Intel.
Birrittella M.S. (2015.), Intel Omni-Path Architecture Technology Overview, Intel.
Intel 64 and IA-32 Architectures Software Developer’s Manual, ,( June 2015 )Combined
Volumes: 1, 2A, 2B, 2C, 3A, 3B, 3C and 3D, no. 325462- 057US, Intel.

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Computer Architectures and Principles
Motoyoshi M. (2009), Through-Silicon Via (TSV), Proc. IEEE, vol. 97, no. 1, pp. 43–48.
M. Rouse (2013), Definition: multi-core processor. TechTarget.
Prinslow G. (2011), Overview of performance measurement and analytical modeling
techniques for multicore processors. URL:
http://www.cs.wustl.edu/~jain/cse567-11/ftp/multcore/
Schauer B. (2008), Multicore processors – a necessity. ProQuest discovery guides: 1-14.
Shanker V. [Online], Optimization of a Parallel Application for Multi-Core Environments,.
Available: http://software.intel.com/en-us/blogs/2013/03/04/optimization-of-a-parallel-
aplication-formulti-core-environments
Ismail D. [Online], Multi-Core Processor Performance Analysis – A Survey. Available:
http://www.cse.wustl.edu/~jain/cse567-13/ftp/multicore/index.html
Tilera Corporation, Tilepro64 Processor [Online]. Available:
http://www.tilera.com/sites/default/files/productbriefs/TILEPro64_Processor_PB019_v4.pdf
Hennessy J.L., Patterson D.A., Computer Architecture A Quantitative Approach, 5th edition.
Adapteva [Online], Epiphany-IV 64-core 28nm Microprocessor (E64G401),. Available:
http://www.adapteva.com/products/silicon-devices/e64g401/
J. Doweck (2006), Inside Intel® Core microarchitecture. Hot Chips 18 Symposium (HCS),
IEEE.
Shimpi A. [Online], Intel Core i7 4960X (Ivy Bridge E) Review. Available:
http://www.anandtech.com/show/7255/intel-core-i7-4960x-ivy-bridge-e-review

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Computer Architectures and Principles
Intel [Online], Intel® Core™ i7-4960X Processor Extreme Edition (15M Cache, up to 4.00
GHz),. Available: http://ark.intel.com/products/77779
AMD [Online], AMD Phenom II Processors. Available:
http://www.amd.com/en-us/products/processors/desktop/phenom-ii#
AMD [Online], AMD Desktop Processor Solutions. Available:
http://products.amd.com/%28S%285zwsrs3m1nwfpw45egnycg45%29%29/pages/
DesktopCPUDetail. aspx?
id=641&P=&Q=&f3=&f4=&f5=&f6=&f7=&f8=&f9=&P0=&P1=&P2
Wasson S. and Kowaliski C. [Online], AMD's Phenom II X6 processors, With two more cores
and a turbocharger, Thuban aims to put AMD back in contention, Available:
http://techreport.com/review/18799/amd-phenom-ii-x6-processors
CPU World [Online], AMD Phenom II X6 1100T vs Intel Core i7-4960X. Available:
http://www.cpuworld.com/Compare/987/
AMD_Phenom_II_X6_1100T_vs_Intel_Core_i7_Extreme_Edition_i7-4960X.html
Rolf T. [Online], Cache Organization and Memory Management of the Intel Nehalm
Computer Architecture,. Available: http://rolfed.com/nehalem/nehalemPaper.pdf
Wasson S. [Online], Intel's core i7 processors, The Tech Report. Available:
http://techreport.com/review/15818/intel-core-i7-processors