ITC544 Computer Organisation and Architecture Assignment 2: MARIE and ISA

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This assignment covers topics related to MARIE and ISA in ITC544 Computer Organisation and Architecture course. It includes answers to questions related to opcode, memory size, instruction set, and more.

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Running head: ITC544 COMPUTER ORGANISATION AND ARCHITECTURE
Assignment 2: MARIE and ISA
Name of the Student
Name of the University
Author’s Note

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ITC544 COMPUTER ORGANISATION AND ARCHITECTURE
Question 1 answer:
1.1. The number of bits required for the opcode is calculated below:
Number of operation in the instruction set = 122
Operation instruction = 2^7
Thus 7 bits of opcode is needed
1.2. The bits that are left for the instruction address part is calculated below:
Memory unit of the computer = 16 bits /word
Thus the address part = 16 -7
= 9 bits
1.3. The maximum allowable size calculated for the memory is calculated below:
= 2 ^9 bits
1.4. The largest binary number that is unassigned and accommodated in the memory for one word is
calculated as;
2^16 -1
= 16 1s
Question 2 Answer:
For the instruction Add 1000
1.1. Immediate
Value to be added in the accumulator = 1000
Value already in the accumulator = 500
Therefore, the total value in the accumulator = 500+1000
= 1500
1.2. Direct
Effective address = 1000
Value needed to be added in the accumulator = 1400
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ITC544 COMPUTER ORGANISATION AND ARCHITECTURE
Value already in the accumulator = 500
Therefore, the total value in the accumulator = 1400+500
= 1900
1.3. Indirect
Effective address = 1400
Value in the accumulator = 1300
Value already in the accumulator = 500
Therefore, the total value in the accumulator = 1300+500
= 1800
1.4. Indexed
R1 value = 200
Effective address = 1000+200
= 1200
Therefore the value that is in the 1200 is added with the accumulator.
1000 is in the location 1200
Therefore, loaded value in the accumulator = 500+1000
= 1500
Question 3 Answer:
For the expression S = (A+B) – (C+D) the following MARIE program is created:
100 LOAD A
101 ADD B
102 STORE X
103 CLEAR
104 LOAD C
105 ADD D
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ITC544 COMPUTER ORGANISATION AND ARCHITECTURE
106 STORE Y
107 CLEAR
108 LOAD X
109 SUBT Y
10A STORE S
10B HALT
For the register the program developed is given below:
ADD R1, A, B
ADD R2, C, D
SUBT A, R1, R2
Three address are used for storing the result in the first assembly program and a single
memory is needed for storing data in the second program.
Question 4 answer:
a.
Address Hex
100 1108 Start LOAD A
101 3109 ADD B
102 210B STORE D
103 A000 CLEAR
104 F400 OUTPUT
105 B10B ADDI D
106 2014 STORE B
107 7000 HALT
108 0200 A HEX 00FC
109 0014 B DEC 14
10A 0001 C HEX 0108
10B 0000 D HEX 0000
b.

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ITC544 COMPUTER ORGANISATION AND ARCHITECTURE
Symbol Location
A 108
B 109
C 10A
D 10B
Start 100
c.
On the termination of the program the value contained in the 10A is loaded in the accumulator.
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ITC544 COMPUTER ORGANISATION AND ARCHITECTURE
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