Exploring Addressing Modes and Instruction Set Design

The assignment explores several key concepts within digital systems, particularly focusing on how various addressing modes are employed to manipulate data stored in a computer's memory. The main components include: Task 1, which discusses bank accounting for memory based on the number of address bits required by RAM chips; Task 2, which involves calculating instruction sets and determining opcode size for a system with a specific word length; Task 3, which provides practical examples of different addressing modes (immediate, direct, indirect, indexed) used to load values into the accumulator; and Task 4, which translates a mathematical expression across three machine types: two-address, one-address, and zero-address machines. Through these tasks, students are expected to gain an understanding of how instruction formats and memory architectures affect computing processes.

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Computer Organization and Architecture
A) Student Name #
B) Student Id #
C) Subject Code #
D) Assignment 2: MARIE & ISA
Page 1 of 9

Task 1
256M * 128 Memory built using 1024K * 32 RAM chips:
a) 256M = 228,
1024K = 220
128 = 27
32 = 25
The number is (256M*128) / (1024K*32) =
(228*27) / (220*25)
= 235 / 225
= 210
= 1024
The number of RAM chips required is 1024.
b) For every 16-bit word the number of RAM chips required is 2.
c) Number of address bits required is:
1024K = 220
Hence 20 address bits are required for every chip.
d) For a memory, number of banks required depends solely on RAM chips and
main memory’s addressable items. It is not dependent on addressable item’s size.
Hence Bank Account for the given memory will be =
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256M/1024K = 228 / 220 = 28
= 256.
e) Address bits required for all memory is:
256M = 228
Hence 28 address bits are required.
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Task 2
System’s memory unit = 48 bits per word
Instruction Set = 240 distinct operations
Each instruction stored in 48 bits and consists of opcode and address part
(just 1 address allowed)
a)
The total numbers of instructions to be handled are 240 instructions, hence to make
room for every instruction it will require 240 unique instruction codes i.e.
As the bits are addressed in the power of 2:
27 will give only 128 unique instructions hence we will move to the next set which
is 28 that will provide 256 unique instruction codes and will accommodate required
240 instructions easily.
Hence 8 bits are needed for the opcode
b)
The numbers of bits left for the address part are:
48 – 8 = 40 bits.
40 bits are left for the address part.
c)
The largest unsigned binary number to be accommodated is:
48 1’s
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i.e. 248 – 1
281,474,976,710,656 – 1 = 281,474,976,710,655
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Task 3
i) The actual value loaded into the AC using Immediate Addressing Mode:
1000
As for immediate addressing operand is a part of instruction. Instruction is given ADD
1000. So this loads 1000 to the accumulator.
ii) The actual value loaded into the AC using Direct Addressing Mode:
1400
As Direct Addressing mode loads the instructions content to the accumulator. Here we
can see in the above figure memory address 1000 hold the content value 1400. Hence it will be
loaded into the accumulator.
iii) The actual value loaded into the AC using Indirect Addressing Mode
1300
Indirect addressing mode works according to the principle EA = (A) which means search
for content at the instruction memory address and then look for content of operand specified.
Here Add 1000 looks for content at 1000 memory address which is 1400. Now it looks for
content at 1400 which is 1300 and hence the answer.
iv) The actual value loaded into the AC using Indexed Addressing Mode:
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1500
Indexed Addressing mode works according to the principle EA = A + R where we
already got the result for EA = (A) through indirect addressing mode. Now we have to add
register R1 value to this which is 200. Hence result is 1300 + 200 =1500.
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Task 4
The expression: A= (B + C) * (D - E)
Two Address Machine:
MOV A, B #A B
ADD A, C # AA+C
MOV Y, D #YD
SUB Y, E #YY-E
MPY A, Y #AA*Y AA*Y i.e. (A = (B+C)*(D-E)
One Address Machine:
LOAD D
SUB E
STOR Y #YD-E
LOAD B
ADD C
STOR A #AB+C
MPY Y #AA*Y i.e. (A = (B+C)*(D-E)
Note: The text after ‘#’ is only comments to explain the instructions
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Zero Address Machine i.e. a Stack:
Push B
Push C
ADD # B+C
Push D
Push E
SUB #D-E
MPY # (B+C)*(D-E)
Pop # A = (B+C)*(D-E)
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