CMPE 263 Spring 2019: Homework 4 - Instruction Set Solutions

This document provides a comprehensive solution to CMPE 263 HW-4, focusing on computer architecture and assembly language concepts. It begins by evaluating a given arithmetic operation using different instruction set architectures: three-address, two-address, one-address, and zero-address (stack). The solution then includes the conversion of an arithmetic expression to Reverse Polish Notation (RPN) and infix notation. The assignment further explores addressing modes, calculating Effective Addresses (EA) for direct, immediate, relative, register indirect, and indexed addressing. It also analyzes signed and unsigned number comparisons, determining the difference, and setting status bits (Z, C, S, V). Finally, it addresses the stack operations during a call and return instruction and lists the conditional branch instructions.

Q1. Consider the arithemetic operation below,
x=(3*A*B*C+D*E*F)/(G-H-2*K)
A) using general resister computer with three address instructions
MUL R1,3,A R1=3+M[A]
MUL R1,R1,B R1=R1+M[B]
MUL R1,R1,C R1=R1+M[C]
MUL R2,D,E R2=M[D]+M[E]
MUL R2,R2,F R2=R2+M[F]
ADD R1,R1,R2 R1=R1+R2
SUB R2,G,H R2=M[G]-M[H]
MUL R3,2,K R3=2*M[K]
SUB R2,R2,R3 R2=R2-R3
DIV X,R1,R2 M[X]=R1/R2
B) using general register computer with two address instructions
MOV R1,3 R1=3
MUL R1,A R1=R1*M[A]
MUL R1,B R1=R1*M[B
MUL R1,C R1=R1*M[C]
MOV R2,D R2=M[D]
MUL R2,E R2=R2*M[E]
MUL R2,F R2=R2*M[F]
ADD R1,R2 R1=R1+R2
MOV R2,G R2=M[G]

SUB R2,H R2=R2-M[H]
MOV R3,2 R3=2
MUL R3,K R3=R3*M[K]
SUB R2,R3 R2=R2-R3
DIV R1,R2 R1=R1/R2
MOV X,R1 M[X]=R1
C) Using a general register computer with one address instructions
LOAD 3 AC=3
MUL A AC=AC*M[A]
MUL B AC=AC*M[B]
MUL C AC=AC*M[C]
STORE T M[T]=AC
LOAD D AC=M[D]
MUL E AC=AC*M[E]
MUL F AC=AC*M[F]
ADD T AC=AC+M[T]
STORE T1 M[T1]=AC
LOAD G AC=M[G]
SUB H AC=AC-M[H]
STORE T2 M[T2]=AC
LOAD 2 AC=2
MUL K AC=AC*M[K]
STORE T3 M[T3]=AC

LOAD T2 AC=M[T2]
SUB T3 AC=AC-M[T3]
STORE T4 M[T4]=AC
LOAD T1 AC=M[T1]
DIV T4 AC=AC/M[T4]
STORE X M[X]=AC
D) zero address(stack)
PUSH 3 TOP=3
PUSH A TOP=A
MUL TOP=3*A
PUSH B TOP=B
MUL TOP=3*A*B
PUSH C TOP=3*A*B*C
PUSH D TOP=D
PUSH E TOP=E
MUL TOP=D*E
PUSH F TOP=F
MUL TOP=D*E*F
ADD TOP=(3*A*B*C+D*E*F)
PUSH G TOP =G
PUSH H TOP=H
SUB TOP=(G-H)

PUSH 2 TOP=2
PUSH K TOP=K
MUL TOP=2*K
SUB TOP=(G-H-2*K)
DIV TOP=(3*A*B*C+D*E*F)/(G-H-2*K)
POP X M[X]=TOP
Q2. Do the following
A. Convert to RBN
A/B + C*(D+E)/F – G/H
= A/B + C*(DE+)/F – G/H
= AB/ + C*(DE+)/F – G/H
= AB/ + C(DE+)*/F – G/H
= AB/ + C(DE+)*F/ – G/H
= AB/ + C(DE+)*F/ – GH/
= AB/ C(DE+)*F/ + – GH/
= AB/ C(DE+)*F/ + GH/ +

B. Convert to infix notation
ABCDEFG //++**
PUSH A TOP=A
PUSH B TOP=B
PUSH C TOP=C
PUSH D TOP=D
PUSH E TOP=E
PUSH F TOP=F
PUSH G TOP=G
DIV / TOP=(F/G)
DIV / TOP=(E/(F/G))
ADD + TOP=(D+E/(F/G))
ADD + TOP=(C+(D+E/(F/G))
MUL * TOP=(B*(C+(D+E/(F/G)))
MUL * TOP=A*(B*(C+(D+E/(F/G)))
infix notation is therefore A*(B*(C+(D+E/(F/G)))

Q3. An instruction is stored in location 350H with an address field of value of
0270H. a processor register RI contains 0300H. evaluate EA for each case:
A. Direct
EA = value of the address field
=0270H
B. Immediate
EA = address of an operand
=0300H
C. Relative
EA = Content of Program Counter + Address part of the instruction
=350H+270H
=5C2H
D. Register Indirect (RI)
EA = processor register for the EA of the operand
=0300H
E. Indexed (RI)
EA = Content of Index Register + Address part of the instruction

=0300H+0270H
=0570H
Q4. A program in a computer compares two (signed – unsigned) numbers A
and B by performing a subtraction A – B and updates status bits Z, C, S, and
V. let A = 11110000, B=01010101. Evaluate the next for signed and
unsigned:
Q 4
a)
Signed in the computer means the int variable is capable of receiving the negative values hence
1 bit is used for representing the sign symbol while the unassigned integer means we are dealing
with only the positive int hence no bits are used for representing the sign symbol
b)
11110000 – 01010101

-16 – 85 = 11111111111111111111111110011011
= -101
Z = 0
V=1
C=0
S=1
c)
BGT = 0
BGE = 0
BLT = 1
BE = 0
BNE = 1
Q5)
A) Before call instruction
PC =0X5631H
SP = 0X35FE
TOS = 0x1234H

B) After call instruction
SP <- SP-1 = 35FE -1 = 35FD
PC = 5631H + 1 = 5632
TOS = 5631H+1 = 35305H
C) After the return instruction
PC= value next instrunction = 5631H + 1 =35305H
SP = increments by 2= 35FF
TOS= 5631H