Computer Organization and Architecture: Number Systems and Interrupts

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Table of Contents
Question 1:.......................................................................................................................................2
a.).................................................................................................................................................2
b.).................................................................................................................................................2
c.).................................................................................................................................................4
Question 2:.......................................................................................................................................6
a.).................................................................................................................................................6
b.).................................................................................................................................................9
Question 3:.......................................................................................................................................9
a)..................................................................................................................................................9
b)..................................................................................................................................................9

Question 1:
a.
a. Given: (152)b=0x6A
To find: value of b?
Solution:
0x6A = (6A) ₁₆ = 6 * 16¹ + A*16⁰ = 96 + 10 = 106 ( A = 10 in Hexadecimal)
(152) *b = 1 * b² + 5 * b¹ + 2 * b⁰
(152) *b = b² + 5b + 2
After equating both sides,
= b² + 5b + 2 = 106
=b² + 5b - 104 = 0
=b² + 13b - 8b - 104 = 0
=b(b+13) - 8(b + 13) = 0
=(b-8) (b+13) = 0
According to the rules of quadratic equations we have, b = 8 and b = - 13
b = 8, since b cannot be < 0
which means
b = 8
b.
i) 0xBAD into 3-base representation
Solution:
In this question it is given that it’s a 0x number which means it is Hexadecimal
number, so by that conclusion it can also be written as (BAD)16
According to the rules of Hexadecimal number system,
This question can be expanded as
B*16^2 + A*16^1+ D*16^0
According to positional decimal system,
B=11, A=10 and D=13
So, after replacing the values of A, B and D,
11*256+10*16+13*1, which equals to 2989.
2989 is a decimal number

Now we divide the answer by 3 until we get divisor =0
Divisor Remainder
2989/3 996 1
996/3 332 0
332/3 110 2
110/3 36 2
36/3 12 0
12/3 4 0
4/3 1 1
1/3 0 1
Now write the remainder from bottom to top which is 11002201
Hence 0xBAD into 3-base representation is 11002201.
ii) 3217 into 2-base (binary) representation
Solution:
Result Remainder
3217/2 1608 1
1608/2 804 0
804/2 402 0
402/2 201 0
201/2 100 1
100/2 50 0
50/2 25 0
25/2 12 1
12/2 6 0
6/2 3 0
3/2 1 1
½ 0 1

3217 into 2-base (binary) representation is 110010010001
iii) 1235 into octal representation
To convert this number into octal representation we have to find the LCM of 1235
using 8
So, the steps will be
Result Remainder
1235/8 154 3
154/8 19 2
19/8 2 3
Since 2<8, then the answer is (2323)8
iv) 21.218 into decimal representation
This above value is already a decimal representation but another way of
representing this is 21218/1000
c.)
i) One’s complement: The range of one’s compliment for any N-bit binary number is in
the range from –(2N-1-1) to (2N-1-1)
so, after substituting the value of N= 3 (as the word size is 3 bits),
the range of 3 bits digit is from -3 to +3.
The biggest negative value is -3 and the biggest positive value is +3.
ii) Two’s complement: In this question we don’t have a bit for a dedicated sign, we
know that in sign magnitude, negative values have 1 as their leftmost bit and positive
values have 0 as their leftmost bit.
The biggest positive number of two’s compliment is represented by 2N-1-1, and the
biggest negative number is represented by -2N-1.
The above formula gives us the following decimal values
-4, -3, -2, -1, 0, +1, +2, +3 and Binary two’s compliment representation of these values
are 100, 101, 110, 111, 000, 001, 010, 011.
Decimal value Binary
(two’s-complement representation)
Following number’s
Two’s complement (23-n)2
-4 100 100

-3 101 011
-2 110 010
-1 111 001
0 000 000
1 001 111
2 010 110
3 011 101
iii) Signed Magnitude: In Signed Magnitude representation, one bit is known as sign bit
which is dedicated to the sign.
The largest positive number using sign magnitude for N bits is 2N-1-1 and the largest
negative number of N bits size is –(2N-1-1). In sign magnitude we have two kind of zeros -
0 and +0.
For N=3, the biggest positive value is 3 and biggest negative value is -3

Question 2:
a.)
ORG 000
INPUT USER /acquire input
SUBT TWO /subtracting 2 from result
PRINT, STORE Z /AC stored in Z when processing of Z is done
CLEAR
ADD X1 /Adding AC and X1
ADD X2 /Adding AC and X2
STORE TOTAL /result after adding of X1 and X2
/now X1 = X2
LOAD X2 /loading X2 in AC
STORE X1 /storing value in X1
LOAD TOTAL /generating value in AC
STORE X2 /X2 will be stored in AC
LOAD Z /Z loading register
SUBT ONE /subtracting 1 from Z
SKIPCOND 000 / AC<0, avoid cond 000
JUMP PRINT /start looping and printing
LOAD TOTAL /total value in AC
OUTPUT /display program's output
HALT /pause current process execution
/Initialization of progression
USER, DEC 0
ONE, DEC 1
TWO, DEC 2
Z, DEC 0

X1, DEC 0
X2, DEC 1
TOTAL, DEC 0
 When entered input = 7 then output = 13:

 When entered input = 15 the output = 610:
 When the input = 20 then output = 6765:

b.)
The maximum value in the compiler will be: 2147483647
All values after this will show incorrect output.
Question 3:
a)
a) An interrupt is notification to the system processor to notify than an event from whether
hardware or software. The working of interrupt is based like, when an interrupt occurs,
the current instruction is executed by the system controller and start the ISR or Interrupt
Service Routine. It is predefined in the system of the steps to be taken when a system
interrupt occurs.
There are also some circumstances where there are more than one interrupts occurring at
the same time in a computer system and there are certain det of system protocols which
are deployed in these kinds of situations. In any given scenario, if a interrupt occurs at
any instance, the system checks the interrupt flags to determine what activity caused the
interrupt actually and in case of multiple interrupt , each interrupt is handled in order of
their priority which means the one with high priority will get resolved first and the rest
will get resolved by order of their priority but sooner or later they or get handled by
interrupt handler.
b)
b)
 Fast and efficient: When there is single bus architecture, all components like
central processing unit, memory and keyboard, mouse or other peripherals shares
a common bus. This creates a delay in service of bus for the device which waiting
for the bus, this is also known as bus contention, which means some component is
controlling the bus and other are waiting it. Whereas in case of multiple-bus
architecture there are multiple buses which allows different component to use bus
simultaneously. This is the main reason that performance is better in system’s
which have multiple- architecture.
 Expansion: Multiple bus architecture also help the computer to have options for
expansion, which means if there is any shortage of hardware peripherals then we
can connect external devices to the computer to expand our usage. For example, if
all the SATA connections are used in order to connect internal hard drive then
multiple bus architecture also proves the option to connect external hard disk or
flash drives via USB port technology.
 Compatibility: Multiple-bus architecture are also designed in such a way that
they are easy compatible with evolving technology. For example, few years back
PC’s were designed to support PCI express interface which supports video,

network, and other multimedia component. But now we have a newer technology
called PCIe which is a upgrade from PCI, and is still compatible to computer
system which have multiple-bus architecture. Also, there has been some major
changes in USB like USB type C and USB 3.0 but due to the compatibility feature
of multiple-bus architecture.
 Multi-core: Multiple bus architecture also allows the computer system to have
multi core processor. When there is only a single core in the processor than it
causes heavy load on bus because all the components work over one core
processor. But multi core processor reduce this load from the bus as there are
more than one core to perform operations. In addition, this also keeps the wait
time to a minimum.