Computer Organization and Architecture Homework Solution - University

This document presents a comprehensive solution to a Computer Organization and Architecture (COA) assignment. The solution addresses key concepts including memory organization, specifically calculating the number of RAM chips required based on memory size and chip capacity. It then delves into instruction set architecture, exploring different addressing modes such as immediate, direct, indirect, and indexed addressing, and demonstrates how these modes affect the retrieval and manipulation of data. The assignment also covers machine code representation, determining the number of bits needed for opcodes, registers, and addresses. Finally, the solution provides examples of assembly code for different addressing machine architectures (2-, 1-, and 0-addressing machines) to perform a specific calculation, illustrating the differences in code structure and efficiency. The solution is well-structured, with clear explanations and relevant citations for further reading.

Running head: COMPUTER ORGANIZATION AND ARCHITECTURE
Computer Organization and Architecture
Name of the Student:
Name of the University:
Author Note

1
COMPUTER ORGANIZATION AND ARCHITECTURE
Answer to question number 1
a. We need 256 Kbytes, i.e., 256 x 1024 x 128 bits.
We have RAM chips of capacity 32 Kbits = 32 x 1024 bits.
Number of Ram chips required are (256 * 1024 * 128)/(32 * 1024) = 1024
b. We need 256 Kbytes, i.e., 256 x 1024 x 8 bits.
We have RAM chips of capacity 32 Kbits = 32 x 1024 bits.
Number of Ram chips required are (256 * 1024 * 8)/(32 * 1024) = 64
c. Number of RAM chips required are 1024 = 2^30.
Hence address bits needed for each RAM chip required are 30.
d. The number bits present in the RAM = 1024
Hence the number of memory banks required for this system are: 256/32 = 8
e. Address bits required for all memory = 1024/32 = 32
Answer to question number 2
a. Number of bits for the opcode = 16.
b. Number bits required for the registers = 8
Number of bits required for addresses = 16
c. The largest unsigned binary number: 2^48 -1.

2
COMPUTER ORGANIZATION AND ARCHITECTURE
Answer to question number 3
i) Immediate
Value of Add 1000 in immediate addressing is 1000 + 500 = 1500 and the Value is stored in the
accumulator.
ii) Direct
Value of Add 1000 in direct addressing mode is 1400 + 500 =1900.
iii) Indirect
Value of 1000 is 1400. The value of address 1400 is 1300. Hence 1300 + 500 =1800 is loaded
into the accumulator.
iv) Indexed
1000 + R1 = 1200
The value located in 1200 is 1000. Hence the value loaded in the accumulator would be 1000 +
500 = 1500.
Answer to question number 4
2 – addressing machine
MOV R1, B
ADD R1, C
MOV R2, D

3
COMPUTER ORGANIZATION AND ARCHITECTURE
SUB R2, E
MUL R1, R2
MOV A, R1
1 – addressing machine
LOAD B
ADD C
STORE T
LOAD D
SUB E
MUL T
STORE A
0 - addressing machine
PUSH B
PUSH C
ADD
PUSH D
PUSH E
SUB

4
COMPUTER ORGANIZATION AND ARCHITECTURE
MUL
POP A

5
COMPUTER ORGANIZATION AND ARCHITECTURE
Bibliography
Chen, J., Huang, Y., Fu, B., & Li, J. (2013). MacWilliams identity for m-spotty weight
enumerators over finite rings. J. Comput. Inform. Syst, 9(4), 1565-1574.
Mano, M. M. (2017). Digital logic and computer design. Pearson Education India.
Tanenbaum, A. S. (2016). Structured computer organization. Pearson Education India.
Venkat, A., & Tullsen, D. M. (2014, June). Harnessing ISA diversity: Design of a
heterogeneous-ISA chip multiprocessor. In Computer Architecture (ISCA), 2014
ACM/IEEE 41st International Symposium on (pp. 121-132). IEEE.