ITC544 Assignment 2: Computer Architecture - Fibonacci Sequence

This assignment solution for ITC544 delves into computer architecture and assembly language concepts. The first section analyzes a MARIE assembly language program for generating the Fibonacci sequence, including code, input/output examples, and discussion of a threshold value. The second part explores instruction formats and addressing modes, calculating the number of possible instructions and available accommodations. The final section translates a given algebraic expression into 3-addressing, 2-addressing, 1-addressing, and 0-addressing code, demonstrating different approaches to instruction sets and memory management. This solution provides a comprehensive understanding of core computer architecture principles.

Running Head: MARIE AND ISA
Assignment 2: MARIE & ISA
Student Name
Student ID
Subject Code: ITC544

MARIE AND ISA Page 1 of 12
Table of Contents
Answer to question 1.......................................................................................................................2
Answer to question 2.......................................................................................................................4
Answer to question 3.......................................................................................................................5

MARIE AND ISA Page 2 of 12
Answer to question number 1
a. The Fibonacci code series is provided below:
ORG 100
Input // the user needs to Input the number
Store N // the user inputs the number of terms to be printed
Store Ctr // It stores the counter variable in the accumulator
Loop1, Clear
Load Ctr // The counter is loaded into the processor form the accumulator
Subt C1 // The counter is subtracted by c1
Store Ctr
Load F2 // F2 is loaded into the accumulator
Add F1 // F1 is added
Store F3 // F3 is stored into the accumulator
Load F1 // F1 is loaded into the accumulator
Add F1 // F1 is added
Store F3 // F3 is stored into the accumulator
Load F1 // F1 is loaded into the accumulator
Store F2 // F2 is stored into the accumulator
Load F3
Store F1
Load Ctr
Skipcond 400 // Check condition is skipped here

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Jump Loop1 // Jump condition to the location 400
Load Ctr
Output
Load N // Output is N
Output
Load F1 // the Final output is placed
Output
Halt // control halts
N, DEC 0
Ctr, DEC 0
C1, DEC 1
F1, DEC 0
F2, DEC 1
F3, DEC 0
Input: 1

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Output:
Input: 10

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Output:
Input: 21

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Output: 10946
b.
Input: 22

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Output:
Input: 23

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Output:
Input: 24

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Output: -19168
Machine displayed the error value at number 24 because of 23 which is
considered as threshold value of machine. Therefore, for n= 23 is a maximum number
which can provide correct result.
Answer to question number 2
Number of possible instructions is 2^11=2048
Given that the size of the address field is 4.
Number of 2-addressing instruction = 6×2^4 ×2^4 =1536
Number of 1-addressing instruction = 30×2^4 =480
Number of accommodations left = 2048 – 2016 = 32

MARIE AND ISA Page 10 of
12
Answer to question number 3
Given expression, A = (B+C)*(D-E)
3 addressing code for the expression is
ADD R1, B, C
SUB R2, D, E
MUL A, R1, R2
2 addressing code for the expression is
LOAD R1, B
ADD R1, C
LOAD R2, D
SUB R2, E
MUL R2, R1
STORE A, R2
1 addressing code for the expression is
LOAD B
ADD C
STORE T

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Load D
SUB E
MUL T
STORE A
0 addressing code for the expression is
PUSH B
PUSH C
ADD
PUSH D
PUSH E
SUB
MUL
Store A