Solved: Data Representation and Digital Logic in Computer Architecture

This document presents a solved homework assignment focusing on data representation and digital logic within the context of computer architecture. It includes solutions for converting numbers between different bases (decimal, binary, octal, hexadecimal, and base-3), determining the range of representable numbers in one's complement, two's complement, and signed magnitude representations for a 3-bit computer. The assignment also addresses digital logic, including proving the equivalence of combinational circuits and minimizing logic gate diagrams. De-Morgan's Law is applied to simplify Boolean expressions. Desklib is a valuable resource for students seeking additional solved assignments and past papers to enhance their understanding of computer architecture concepts.

Running head: COMPUTER ARCHITECTURE
Computer Architecture
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1COMPUTER ARCHITECTURE
Answers for Question 1:
a) X value:
Given Question, (152) x= (6A) 16
So, to find the value of X the procedure is
 X2 + (5 * X1) + (2 * X0) = (6 * 161) + (10 * 160)
 X2 + 5X + 2 = 106
 X2 + 5X - 104 = 0
 X2 + 13X - 8X – 104 = 0
 X(X + 13) – 8(X + 13) = 0
 (X - 8) (X + 13) = 0
 X = 8 and X = -13
Therefore, determined value for X is 8.
The equation can be written in the form (152)8= (6A) 16
b) Conversions:
i) BED16 to base-3
The decimal value of BED = (B * 162) + (E * 161) + (D * 160)
= 2816 + 224 + 13
= (3053)10
(3053)10 =
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2COMPUTER ARCHITECTURE
So, after converting to base-3 (BED)16 = (11012002)3
ii) 3217 to base-2
(321)7 = (3 * 72) + (2 * 71) + (1 * 70)
= (162)10
Again, (162)10 =
After converting (162)10 to binary is (10100010)2
iii) (1235)10 to octal number
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3COMPUTER ARCHITECTURE
Therefore, after the octal number of (1235)10 = (2323)8
iv) 21.218 to decimal number
21.218 = (2 * 81) + (1 * 80). (2 * 8-1) + (1 * 7=8-2)
= 17 + 0.25 + 0.015625
= 17.265625
So, the decimal number of 21.218 is 17.265625
c) i) In 3 bit computer size, lowest –ve number for one’s complement number = 100
In 3 bit computer size, highest +ve number for one’s complement number = 011
ii) In 3 bit computer size, lowest –ve number for two’s complement number = 101
In 3 bit computer size, highest +ve number for two’s complement number = 011
iii) In 3 bit computer size, lowest –ve number for signed magnitude number = 111
In 3 bit computer size, highest +ve number for signed magnitude number = 011
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4COMPUTER ARCHITECTURE
Answers of Question 2:
a) From the question, output of L.H.S is
a b c d
0 0 0 1
0 1 0 1
1 0 0 1
1 1 1 0
From the given R.H.S., the output of the circuit is
a b c d e
0 0 1 1 1
0 1 1 0 1
1 0 0 1 1
1 1 0 0 0
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5COMPUTER ARCHITECTURE
Therefore, output of L.H.S. = R.H.S.
From above, it can be said that both the circuit are equal.
b) The given circuit that can be minimized from given circuit is:
The above circuit can be represented by
So, the final circuit can be minimized by
c) X’ + Y’ + XYZ’
= X’ + Y’ + (X’ + Y’ + Z)’ [De-Morgan’s Law]
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6COMPUTER ARCHITECTURE
= (XY (X’ + Y’ + Z))’ [De-Morgan’s Law]
= (XX’Y + XYY’ + XYZ)
= (0 + 0 + XYZ)
= (XYZ)’
= X’ + Y’ + Z’ [De-Morgan’s Law]
Hence, X’ + Y’ + XYZ’ = X’ + Y’ + Z’ [PROVED]
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