Computer Organization: Cache Memory Addressing and Design

This assignment provides a detailed analysis of cache memory addressing schemes, including direct mapped, fully associative, and set-associative caches. It covers the breakdown of memory addresses into tag, line, and offset fields, and calculates the number of bits required for each field based on the given parameters. The solution determines the total addressable units, the number of blocks in main memory, and the number of lines/blocks in the cache for each cache type. The assignment offers a comprehensive understanding of cache memory organization and addressing, crucial for computer architecture and organization. This solution is available on Desklib, a platform offering AI-based study tools for students, along with many other solved assignments and past papers.

a. Direct Mapped Cache Addres_format:
// (tag, line, word) //
Given , Number of bits in Tag field = 20 bits;
Number of bits in offset field = log264 = 6 bits
Total number of bits in address = 32
Then number of bits for lines/blocks in cache = 32 – 20 – 6 = 6 bits
TAG field Line Field Offset Field
20 bits 6 bits 6 bits
Total addressable units in bytes = 2 ^ 32 = 4GB
Number of blocks in Main Memory = 2 ^ (number of tag field bits + number of Line Fields)
= 2 ^ 26 = 64MB
Number of lines/blocks in cache = 2 ^ number of bits in Line field = 2 ^ 6 = 64 blocks
Number of bits in TAG field = 20 bits.
b. Fully Associative Cache Address_format:
// (tag, word) //
Given number of bits for offset field = log264 = 6 bits
Total number of bits in address = 32
Then number of bits for TAG field = 32 – 6 = 26 bits.
TAG Field Offset Field
26 Bits 6 Bits
Total addressable units in bytes = 2 ^ 32 = 4GB
Number of blocks in Main Memory = 2 ^ (number of tag field bits)
= 2 ^ 26 = 64MB

Number of lines/blocks in cache = Size of Cache / Size of block.
Since Size of Cache not mentioned, this can’t be determined
Number of bits in TAG field = 26 bits
c. 4 way Set Associative Cache Address_format:
//(tag,set,word)//
Given, number of bits for TAG field = 9 bits.
Given number of bits for offset field = log264 = 6 bits
Total number of bits in address = 32
Bits for determining set in Cache = 32 – bits in tag – bits in offset = 32 – 9 – 6 = 17 bits
Then Number of sets in cache = 2 ^ number of set bits = 2 ^ 17 = 128K
TAG Field Set Field Offset Field
9 bits 17 bits 6 bits
Total addressable units in bytes = 2 ^ 32 = 4GB
Number of blocks in Main Memory = 2 ^ (number of tag field bits + set Field bits)
= 2 ^ 26 = 64MB
Total Number of lines in Cache = number of Way * Number of Sets
= 4 * 128K = 512K ( 2 ^ 19)
Number of bits in TAG field = 9 bits