Instruction Set Architecture and Computer Organization Concepts

This assignment solution delves into various aspects of computer organization, focusing primarily on instruction set architecture. It addresses questions related to assembly language programming, including address labels, instruction execution, and memory organization. The solution provides detailed explanations of converting between integer representations (binary, decimal, hexadecimal), explores different addressing modes, and discusses the impact of pipelining on instruction execution speed. Furthermore, it contrasts RISC and CISC architectures, highlighting the key features and benefits of each. The document also includes a bibliography referencing relevant academic resources. Desklib provides access to this and many other solved assignments to aid students in their learning.

Running head: COMPUTER ORGANIZATION
Computer Organization
Name of the Student:
Name of the University:
Author Note

1
COMPUTER ORGANIZATION
Answer to question number 1
a.
Address Hex Label Instruction
ORG 100
200 1209 Begin LOAD Base
201 320A ADD Offs
202 420B Loop SUBT Two
203 220C STORE Addr
204 8800 SKIPCOND 800
205 9208 JUMP Done
206 C20C CLEAR
207 A000 LOAD Offs
208 7000 Done HALT
209 0200 Base HEX 200
20A 000B Offs DEC 11
20B 0002 Two HEX 0002
20C 0007 Addr HEX 007
b.
Symbol Location
Addr 20C
Base 209
Begin 200
Done 208

2
COMPUTER ORGANIZATION
Loop 202
Offs 20A
Two 20B
c.
AC = 200 + 011 – 002 = 209
Answer to question number 2
a) 0100 0001 1000 0101 –> 0100 – SUBT , 0001 – 1, 1000- 8, 0101- 5 -> SUBT 185
b) 1000 0100 0000 0000 –> 1000 –SKIPCOND, 0100 – 4, 0000 – 0, 0000- 0 -> SKIPCOND
400
c) 0111 0000 0000 0000 - HALT
Answer to question number 3
ORG 100
If, Load X
Subt One
Skipcond 400
Jump Endif
Then, Load X
Add Two
Store Y

3
COMPUTER ORGANIZATION
Clear
Store X
Endif, Load Y
Add Seven
Store Y
Halt
X, Dec ?
Y, Dec ?
One, Dec 1
Two, Dec 002
Seven, Dec 007
Answer to question number 4
INTEGER BINARY HEX
2-BYTE BIG
ENDIAN (hex
value as seen in
memory)
2-BYTE LITTLE
ENDIAN (hex
value as seen in
memory)
7 0111 007 0x007 0x007
1329 10100110001 531 0x531 0x531
-7 -111 -7 1x007 1x007

4
COMPUTER ORGANIZATION
-27109
-
110100111100101 -69E5 1x69E5 1x69E5
31307 111101001001011 7A4B 0x7A4B 0x7A4B
Answer to question number 5
Mode Value Loaded into AC
Immediate 700
Direct 1200
Indirect 1100
Indexed 700
Answer to question number 6
The instruction has four process and hence it requires four cycle to complete the
instruction. However, with the use of the pipelining method the process can be broken down
into four sub processes. Hence, the instruction set can be performed in four different cycle.
This is same for both the pipelining and non-pipelining instructions have the same result and
are completed in the same time. Whereas in situation there are more than one instruction are
very efficiently performed with the help of the pipelining technique that would be help the
process and it would make the process faster for the instruction set and complete the whole
program.
Answer to question number 7

5
COMPUTER ORGANIZATION
RISC architectures is referred to set of instruction that is available within the
architectures that offers to have fewer cycles per instruction as compared to complex
instruction set computer. This uses simple commands that are minimally divided into several
instructions. In this architecture, every instructions are expected to work on small jobs. Every
instruction needs to be of similar length. Maximum commands are being completed within
the one machine cycle. The simple architecture includes a PC, program memory, IR and a
decoder. After decoding the messages, CW transfers the data-to-data path and finally the data
gets stored within the data memory. John cocke made significant contribution for this fields.
The discovery and systematizing of the fundamental transformations which are used in the
optimization of the compilers have been done by Cocke and hence his contribution was very
significant.

6
COMPUTER ORGANIZATION
Bibliography
Farhat, H. (2017). A Comparative Study of Early Instruction Set Architectures and their
Effect on Current Computer Architecture Coverage. In Proceedings of the
International Conference on Frontiers in Education: Computer Science and
Computer Engineering (FECS) (pp. 215-220). The Steering Committee of The World
Congress in Computer Science, Computer Engineering and Applied Computing
(WorldComp).
Harris, S., & Harris, D. (2015). Digital design and computer architecture: arm edition.
Morgan Kaufmann.
Tanenbaum, A. S. (2016). Structured computer organization. Pearson Education India.