Computer Organization and Architecture (ITC544) Assignment Solution

This document presents a comprehensive solution to a Computer Organization and Architecture (COA) assignment, covering several key areas. It begins with calculations for disk drive capacity, rotational delay, and access time. The solution then delves into instruction set architecture, determining the number of bits required for opcodes, registers, and memory addressing, along with calculating the maximum memory size and the largest unsigned binary number that can be stored in a memory word. The assignment further explores instruction formats, specifically calculating the number of zero-address instructions possible. Finally, the solution provides assembly language code implementations for a given expression on 2-address, 1-address, and 0-address machines. The solution includes a bibliography of relevant academic sources.

Running head: COMPUTER ORGANIZATION AND ARCHITECTURE
ITC544 Computer Organization and Architecture
Name of the Student
Name of the University
Author’s Note

1
COMPUTER ORGANIZATION AND ARCHITECTURE
Answer 1:
i. Capacity of the drive can be calculated using the formula
Capacity C = Surfaces x Tracks x Sectors x Bytes
= 23 x 512 x 64 x 32
= 24117248
= 23 Gb
ii. The formula used for the calculation of the rotational delay is given below
Rotation delay = ½ x [(60 /RPM) x (1000 /1 Sec)]
= ½ x [(60 /9600) (1000)]
= 6.25 /2
= 3.125 milliseconds
iii. The Access Time is calculated using the formula
Access time = Seek time + latency
= (10 + 3.125) milliseconds
= 13.125 milliseconds
Answer 2:
i. The calculation for finding the Bits needed for the opcode is given below:
= 28 > 232
Therefore, 8 bits needed for the opcode
ii. The calculation for the number of Bits needed to specify the register is given
below:
=> 8 = 23
Therefore, 3 bits needed to specify the register

2
COMPUTER ORGANIZATION AND ARCHITECTURE
iii. The calculation for finding the number of bits left for the address part is given
below:
=> Memory unit – opcode
=> 32- 8 = 24
iv. The calculation for finding the maximum allowable size of memory is given
below: => 224
v. The calculation for finding the largest unsigned binary number which can be
accommodated in one word of memory is
=> 232-1
Answer 3:
The calculation for number of 0 – address instruction possible for the accommodation
of instruction architecture is given below:
Instruction length = 13 bits
Therefore, total number of address instruction = 2^13
= 8192
FIVE 2-address instruction = 5 * 2^5 * 2^5
= 5120
TWENTY 1-address instruction = 20 *2^5
= 640
Therefore, 0 - address instruction left = 8192- (5120 + 640)
= 2432

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COMPUTER ORGANIZATION AND ARCHITECTURE
Answer 4:
The codes for the implementation of the expression on 2, 1 and 0 address machines
are given below:
2 - Address instruction
MOV REG1, X REG1  M [X]
ADD REG1, Y REG1  REG1 + M [Y]
MOV REG2, Y REG2  M [X]
SUB REG2, Z REG2  REG2 – M [Z]
MOV REG3, X REG3  M [X]
MUL REG1, R2 REG1  REG1 * REG2
DIV REG1, R3 REG1  REG1 / REG3
MOV A, REG1 M [A]  REG1
1 - Address instruction
LOAD X REG M [X]
ADD Y REG  A [Z] + M [Y]
STORE T M [T]  REG
LOAD Y REG  M [Y]
SUB Z REG  REG - M [Z]
MUL T REG  REG * M [T]
STORE T M [T]  REG

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COMPUTER ORGANIZATION AND ARCHITECTURE
LOAD X REG M [X]
MUL Y REG  REG * M [Y]
DIV REG REG  REG / M [T]
STORE A M [A]  REG
0 - Address Instruction
PUSH X TOS  X
PUSH Y TOS  Y
ADD TOS  (X+Y)
PUSH Y TOS  Y
PUSH Z TOS  Z
SUB TOS  (Y - Z)
PUSH X TOS  X
PUSH Y TOS  Y
MUL TOS  (X x Y)
MUL TOS  (X+Y) x (Y - Z)
DIV TOS  (X+Y) x (Y - Z) / (X x Y)
POP A M [A]  TOS

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COMPUTER ORGANIZATION AND ARCHITECTURE
Bibliography
Harris, S., & Harris, D. (2015). Digital Design and Computer Architecture: ARM Edition.
Morgan Kaufmann.
Kim, T., Lee, Y. R., Kang, B., & Im, E. G. (2016). Binary executable file similarity
calculation using function matching. The Journal of Supercomputing, 1-16.
Null, L., & Lobur, J. (2014). The essentials of computer organization and architecture. Jones
& Bartlett Publishers.
Patterson, D. A., & Hennessy, J. L. (2017). Computer Organization and Design RISC-V
Edition: The Hardware Software Interface. Morgan kaufmann.
Shin, W., Yang, J., Choi, J., & Kim, L. S. (2014, February). NUAT: A non-uniform access
time memory controller. In High Performance Computer Architecture (HPCA), 2014
IEEE 20th International Symposium on (pp. 464-475). IEEE.
Tanenbaum, A. S. (2016). Structured computer organization. Pearson Education India.