Introduction to Computer Systems: Data Representation and Processing
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Assignment 1: Computers, data, and programming
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Contents
Question 1......................................................................................................................................................3
a..................................................................................................................................................................3
b..................................................................................................................................................................3
c..................................................................................................................................................................6
Question 2......................................................................................................................................................7
a..................................................................................................................................................................7
b................................................................................................................................................................10
Question 3....................................................................................................................................................11
a................................................................................................................................................................11
b................................................................................................................................................................11
List of Figures
Figure 1 test result 1.......................................................................................................................................9
Figure 2 test result 2.......................................................................................................................................9
Figure 3 test result 3.....................................................................................................................................10
Figure 4 multiple bus architecture...............................................................................................................12
Question 1......................................................................................................................................................3
a..................................................................................................................................................................3
b..................................................................................................................................................................3
c..................................................................................................................................................................6
Question 2......................................................................................................................................................7
a..................................................................................................................................................................7
b................................................................................................................................................................10
Question 3....................................................................................................................................................11
a................................................................................................................................................................11
b................................................................................................................................................................11
List of Figures
Figure 1 test result 1.......................................................................................................................................9
Figure 2 test result 2.......................................................................................................................................9
Figure 3 test result 3.....................................................................................................................................10
Figure 4 multiple bus architecture...............................................................................................................12

Question 1
a
To determine the value of b, both sides need to be solved first:
Step 1- converting 0×6A into a decimal number,
0×6A means (6A)16 where 16 stands for hexadecimal form.
Therefore, (6A)16= 6 × 161 + A × 160 ( value of A in hexadecimal form is 10, therefore replacing
A with 10)
(6A)16= 6 × 161 + 10 × 160 = 96+10 = 106.
Step 2- converting (152)b into decimal form,
(152)b = 1 × b2 + 5 × b1 + 2 × b0 = b2+ 5b1+2
Step 3- Equating both sides,
b2+ 5b +2 = 106
b2+ 5b -104 = 0
b2+ 13b- 8b – 104 = 0
b (b+ 13)- 8 (b+13) = 0
(b-8) (b+13) = 0
Therefore, either b is 8 or b is -13.
As b cannot be negative here, hence b = 8 is the correct answer.
b
1
0xBAD represents BAD into hexadecimal form.
Therefore hexadecimal form needs to be converted firstly into base 10, i.e. decimal form.
Step 1 converting it into hexadecimal form
a
To determine the value of b, both sides need to be solved first:
Step 1- converting 0×6A into a decimal number,
0×6A means (6A)16 where 16 stands for hexadecimal form.
Therefore, (6A)16= 6 × 161 + A × 160 ( value of A in hexadecimal form is 10, therefore replacing
A with 10)
(6A)16= 6 × 161 + 10 × 160 = 96+10 = 106.
Step 2- converting (152)b into decimal form,
(152)b = 1 × b2 + 5 × b1 + 2 × b0 = b2+ 5b1+2
Step 3- Equating both sides,
b2+ 5b +2 = 106
b2+ 5b -104 = 0
b2+ 13b- 8b – 104 = 0
b (b+ 13)- 8 (b+13) = 0
(b-8) (b+13) = 0
Therefore, either b is 8 or b is -13.
As b cannot be negative here, hence b = 8 is the correct answer.
b
1
0xBAD represents BAD into hexadecimal form.
Therefore hexadecimal form needs to be converted firstly into base 10, i.e. decimal form.
Step 1 converting it into hexadecimal form
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(BAD)16 = B× 162 + A × 161 + D × 160 = B× 256 + A × 16 + D × 1
(BAD)16= 11× 256 + 10 × 16 + 13 × 1
(BAD)16= 2989
Step 2 Converting the decimal number into base 3
To convert 2989 into base 3, the number has to be divided by 3 and in each step, a reminder has
to be calculated. The quotient in one step will become dividend in the second step until we get 0
in the quotient.
Dividend Remainder
2989 1
996 0
332 2
110 2
36 0
12 0
4 1
1 1
These remainders have been calculated by dividing the number by 3.
To make the base 3 number, remainders have to note from bottom to top.
Hence the number is (11002201)3
2
Step 1 conversion of base 7 into base 10 (decimal)
(321)7 = (3× 72 + 3× 71 + 3 × 70)10
147 + 14 + 1= (162)10
Step 2 conversion of decimal into binary (base 2)
(BAD)16= 11× 256 + 10 × 16 + 13 × 1
(BAD)16= 2989
Step 2 Converting the decimal number into base 3
To convert 2989 into base 3, the number has to be divided by 3 and in each step, a reminder has
to be calculated. The quotient in one step will become dividend in the second step until we get 0
in the quotient.
Dividend Remainder
2989 1
996 0
332 2
110 2
36 0
12 0
4 1
1 1
These remainders have been calculated by dividing the number by 3.
To make the base 3 number, remainders have to note from bottom to top.
Hence the number is (11002201)3
2
Step 1 conversion of base 7 into base 10 (decimal)
(321)7 = (3× 72 + 3× 71 + 3 × 70)10
147 + 14 + 1= (162)10
Step 2 conversion of decimal into binary (base 2)
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To convert a decimal number into a binary number, it has to be divided by 2 and the remainder
of each step will be recorded. The quotient in one step will become dividend in the second step
until we get 0 in the quotient.
Dividend Quotient Remainder
162 81 0
81 40 1
40 20 0
20 10 0
10 5 0
5 2 1
2 1 0
1 0 1
Now the quotient has become zero, therefore the remainder noted form bottom to top is the
binary number, which is (10100010)2
3
Step 1 conversion of base 5 into base 10 (decimal)
(123)5 = 1× 52 + 2 × 51 + 3 × 50
= 25+ 10+ 3
=38
Step 2 conversion of decimal into octal (base 8)
Dividend Quotient Remainder
38 4 6
4 0 4
Now the quotient has become zero, therefore the remainder noted from bottom to top is the octal
number, which is (46)8
of each step will be recorded. The quotient in one step will become dividend in the second step
until we get 0 in the quotient.
Dividend Quotient Remainder
162 81 0
81 40 1
40 20 0
20 10 0
10 5 0
5 2 1
2 1 0
1 0 1
Now the quotient has become zero, therefore the remainder noted form bottom to top is the
binary number, which is (10100010)2
3
Step 1 conversion of base 5 into base 10 (decimal)
(123)5 = 1× 52 + 2 × 51 + 3 × 50
= 25+ 10+ 3
=38
Step 2 conversion of decimal into octal (base 8)
Dividend Quotient Remainder
38 4 6
4 0 4
Now the quotient has become zero, therefore the remainder noted from bottom to top is the octal
number, which is (46)8

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4
Step 1 to convert octal into decimal, each digit has to be multiplied with a power of 8 and after
that all resulting numbers will be added together.
= 2 × 81 + 1 × 80 + 2 × 8-1 + 1 × 8-2
(Power of 8 will increase before decimal point from 0 to 1 from right to left and will decrease
after decimal point from -1 to -2)
= 16 + 1+ 2/8 + 1/64
= 17 + 0.25 + 0.015625
= 17.265625
c
The largest number that can be represented in 3 bits is 3, whose binary representation is 011.
Now the number can be represented in one’s complement as 100.
Two’s complement= 101.
Signed magnitude = 011 where 0 represents a positive sign.
Whereas the smallest number is -3 whose binary representation is 111.
One’s complement = 000
Two’s complement = 001
Signed magnitude = 111, where 1 represents negative number.
Other than these numbers, all require at least 4 bits in order to represent their signed magnitudes.
Step 1 to convert octal into decimal, each digit has to be multiplied with a power of 8 and after
that all resulting numbers will be added together.
= 2 × 81 + 1 × 80 + 2 × 8-1 + 1 × 8-2
(Power of 8 will increase before decimal point from 0 to 1 from right to left and will decrease
after decimal point from -1 to -2)
= 16 + 1+ 2/8 + 1/64
= 17 + 0.25 + 0.015625
= 17.265625
c
The largest number that can be represented in 3 bits is 3, whose binary representation is 011.
Now the number can be represented in one’s complement as 100.
Two’s complement= 101.
Signed magnitude = 011 where 0 represents a positive sign.
Whereas the smallest number is -3 whose binary representation is 111.
One’s complement = 000
Two’s complement = 001
Signed magnitude = 111, where 1 represents negative number.
Other than these numbers, all require at least 4 bits in order to represent their signed magnitudes.
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Question 2
a
Code to calculate the Fibonacci series using MARIE program has been written. The program will
let the user enter a number and the Fibonacci number will be shown in the output.
ORG 000
INPUT USER /to enter the number input
SUBT TWO /Subtracting 2 from it
PRINT, STORE Y /On completing the processing of Y, AC will be stored into Y
CLEAR
ADD Z1 / to add AC and Z1
ADD Z2 / to add AC and Z2
STORE TOTAL /total of Z1 and Z2 will be stored
/now Z1 = Z2
LOAD Z2 /to load Z2 in AC
STORE Z1 /value stored into Z1
LOAD TOTAL /to load value in AC
STORE Z2 / to store the value of Z2 into AC
LOAD Y / to load Y into the register
SUBT ONE /subtracting 1 from Y
SKIPCOND 000 / if AC<0 then avoid cond 000
a
Code to calculate the Fibonacci series using MARIE program has been written. The program will
let the user enter a number and the Fibonacci number will be shown in the output.
ORG 000
INPUT USER /to enter the number input
SUBT TWO /Subtracting 2 from it
PRINT, STORE Y /On completing the processing of Y, AC will be stored into Y
CLEAR
ADD Z1 / to add AC and Z1
ADD Z2 / to add AC and Z2
STORE TOTAL /total of Z1 and Z2 will be stored
/now Z1 = Z2
LOAD Z2 /to load Z2 in AC
STORE Z1 /value stored into Z1
LOAD TOTAL /to load value in AC
STORE Z2 / to store the value of Z2 into AC
LOAD Y / to load Y into the register
SUBT ONE /subtracting 1 from Y
SKIPCOND 000 / if AC<0 then avoid cond 000

JUMP PRINT / to start Loop and print
LOAD TOTAL / to load value of total present in AC
OUTPUT / in order to display the output
HALT / in order to pause the process progression
/ to Initialize the progression
USER, DEC 0
ONE, DEC 1
TWO, DEC 2
M, DEC 0
Z1, DEC 0
Z2, DEC 1
TOTAL, DEC 0
LOAD TOTAL / to load value of total present in AC
OUTPUT / in order to display the output
HALT / in order to pause the process progression
/ to Initialize the progression
USER, DEC 0
ONE, DEC 1
TWO, DEC 2
M, DEC 0
Z1, DEC 0
Z2, DEC 1
TOTAL, DEC 0
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Test results
To verify the program, the following inputs were entered and a screenshot of the output has been
pasted along with it.
When the input is 7
Figure 1 test result 1
When the input is 15
Figure 2 test result 2
To verify the program, the following inputs were entered and a screenshot of the output has been
pasted along with it.
When the input is 7
Figure 1 test result 1
When the input is 15
Figure 2 test result 2
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When the input is 20
Figure 3 test result 3
b
on gradually increasing the value of n, the maximum value can be calculated using this program
is 2147483647, the reason behind this is, that the values that can be stored into the variables
reach the limit and after that limit, it is not possible to store the value. Therefore, the maximum
output stops to 2147483647.
Figure 3 test result 3
b
on gradually increasing the value of n, the maximum value can be calculated using this program
is 2147483647, the reason behind this is, that the values that can be stored into the variables
reach the limit and after that limit, it is not possible to store the value. Therefore, the maximum
output stops to 2147483647.

Question 3
a
Interrupts in a computer system can be seen as a disturbance which is created when the CPU is
processing one query but either user or system requests to execute another query. This can be a
result of either system calls or error conditions also. When an interrupt is generated, CPU should
respond to that in a feasible manner such as using fetch or decode, etc. There are several types of
interrupts such as:
1. The external interrupt is when an input or output device caused the disruption by
requesting processing of some other query.
2. An internal interrupt is when there occurs a problem in the execution of a query or an
error appears during the execution.
3. A software interrupt is when another call is made to different software while the CPU is
working at current software.
To deal with multiple interrupts at a time, there are two approaches:
1. When the CPU is processing an interrupt, it can disable the interrupt request signal so that
it will not disturb the CPU for incoming interrupts and once CPU goes through one
interrupt, it can resume all the pending interrupt and start executing them one by one.
This way CPU ensures sequential execution of multiple interrupts.
2. The second approach is to assign priorities to the interrupts and executing the interrupt
with high priority. In this case, if the CPU is executing one interrupt and another interrupt
with high priority comes, it will send the current interrupt back to the stack and will start
executing the new interrupt. Once the new interrupt gets executed, it will resume back the
old interrupt.
b
Advantages of using multiple bus architecture over single bus architecture:
1. In single bus architecture, if multiple devices need the bus at the same time it will create
conflict, whereas multiple bus architecture will allow multiple devices to execute at the
same time and will reduce waiting time and will increase performance.
2. Multiple bus architecture allows the user to connect more devices to the system.
3. By using multiple bus architecture, the users can connect all the eras of devices whether
being old or new, but this is not the case in a single bus architecture.
a
Interrupts in a computer system can be seen as a disturbance which is created when the CPU is
processing one query but either user or system requests to execute another query. This can be a
result of either system calls or error conditions also. When an interrupt is generated, CPU should
respond to that in a feasible manner such as using fetch or decode, etc. There are several types of
interrupts such as:
1. The external interrupt is when an input or output device caused the disruption by
requesting processing of some other query.
2. An internal interrupt is when there occurs a problem in the execution of a query or an
error appears during the execution.
3. A software interrupt is when another call is made to different software while the CPU is
working at current software.
To deal with multiple interrupts at a time, there are two approaches:
1. When the CPU is processing an interrupt, it can disable the interrupt request signal so that
it will not disturb the CPU for incoming interrupts and once CPU goes through one
interrupt, it can resume all the pending interrupt and start executing them one by one.
This way CPU ensures sequential execution of multiple interrupts.
2. The second approach is to assign priorities to the interrupts and executing the interrupt
with high priority. In this case, if the CPU is executing one interrupt and another interrupt
with high priority comes, it will send the current interrupt back to the stack and will start
executing the new interrupt. Once the new interrupt gets executed, it will resume back the
old interrupt.
b
Advantages of using multiple bus architecture over single bus architecture:
1. In single bus architecture, if multiple devices need the bus at the same time it will create
conflict, whereas multiple bus architecture will allow multiple devices to execute at the
same time and will reduce waiting time and will increase performance.
2. Multiple bus architecture allows the user to connect more devices to the system.
3. By using multiple bus architecture, the users can connect all the eras of devices whether
being old or new, but this is not the case in a single bus architecture.
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