University Report: Evolution of Technology and System Performance

This report provides a comprehensive overview of the evolution of technology over the last 25 years, focusing on key advancements in computer architecture. It delves into the evolution of RISC (Reduced Instruction Set Computing), pipelining, cache memory, and virtual memory, analyzing how each has contributed to improved system performance. The report highlights the benefits of each technology, such as the increased efficiency of RISC, the performance gains from pipelining, the faster data access provided by cache memory, and the memory management capabilities of virtual memory. The report also emphasizes the importance of virtual memory in modern data analysis and storage, and concludes with a discussion on the most influential technology among the four. The report is structured with an introduction, detailed sections on each technology, and a conclusion summarizing the findings and the relative importance of each technological advancement. References from peer-reviewed journals and other sources are included to support the analysis.

Running head: EVOLUTION OF TECHNOLOGY
EVOLUTION OF TECHNOLOGY
Name of the Student
Name of the University
Author note

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EVOLUTION OF TECHNOLOGY
Table of Contents
Introduction................................................................................................................................2
Evolution of the current trends...................................................................................................2
Conclusion..................................................................................................................................4
References..................................................................................................................................5

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Introduction
Evolution in the field of technology has been optimum since the last 25 years.
Different aspect that have been increasing the efficiency process of operation has been
focussed on. Technologies like RISC, Pipelining, Cache memory and Virtual memory has
been providing higher efficiency in the operational process. This report will be discussing
about the benefits that are received due to the evolution of the technologies in last 25 years.
This report also discusses about the technology of highest importance in today’s generation
along with the reason of its importance.
Evolution of the current trends
RISC: RISC has been evolving since a basic stage. Since last 20 years, RISC has been
becoming universal in approach to computing. It has been seen that super computers have
been using the platform of RISC principle for gaining better performance. IT has been seen
that with the help of RISC there is a reduction in number as well as restriction in the number
of instructions that are to be provided (Colwell 2018). Again, it is seen that addressing modes
have been fewer. The instructions that are used are simplified in number. This simplified data
helps in bettering of the data management system. Uniformity of the instructions provided are
highly efficient as well. This high uniformity ensures that the complexity of the entire
operational process decreases (Tagliavini et al, 2019). Another major benefit that is enjoyed
is that the data load store section is very limited in space as less chip space is required for
reduction of the instruction set. Ease of designing is also another essence that can be received
and enjoyed due to the usage of RISC. RISC has been replacing CISC since its introduction
in the system.
Pipelining: Acceptance of pipeline has been very high in today’s computing system.
In this case the main aspect that is to be considered is that there is a huge performance

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improvement. The major benefit that is seen in this case is that more instructions can be
pumped in and hence wise the data and instruction that can be pumped in will be increasing
the efficiency of the operational process. There is a significance increase in processor speed
and hence wise increase the operational process (Mu, Angel & Shasha 2019). The main
reason of having a better and increased performance is because of the high speed of the
processor. In case of using pipeline architecture the main advantage that will be enjoyed is
that the entire process gets completed in 5 cycles where as in case of completing the same
process the process without pipeline it might take 9 cycles for completion.
Cache memory: cache memory has been gaining importance since the late 21st
century. It was the time when speed of completing a single task started mattering. Cache
memory helps in storing the memory closer to the CPU. It can be stated that physically Cache
memory has been more closer than that of the RAM (Rossi et al, 2017). Cache is mainly
required for storing data that and instructions that are required frequently. With respect to the
fact that it provides faster access of instructions to CPU, than operation the operational
process gets benefitted. The reason of this faster instruction provisioning is that the Cache
memory as well as the CPU is located in the same chip, whereas the RAM and CPU is
located in different chips (Santos et al, 2016). With presence of the cache memory, the need
of frequent slower memory retrieval can be eliminated. In case of the absence of the cache
memory, the CPU needs to keep on waiting. Hence wise the main aspect that is considered is
that the time taken for completion of tasks reduces.
Virtual Memory: there have been a drastic increase in data generation while executing
of projects. It is seen that the need of data collection and analysing the same has been
increasing in an exponential manner since last 2 and a half decades (Huang et al, 2019). This
aspect leads to emergence of virtual memory. There are several advantages that are received
in the process. Allocation of memory is the easiest part in case of using virtual memory. The

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cost that is incurred in the processing of the memory allocation also gets reduces in the
process. another major advantage that is received is that elimination of external
fragmentation. Another major benefit that is enjoyed due to the data that are stored in the
virtual memory can be properly mapped. The space that is available in the virtual memory is
much higher than that of the space that is available in the physical memory. The I/O required
for completion of the transaction process is very low. This leads to the fact that the
transaction speed is very high (Seshadri 2016). Swapping process is also performed in a more
efficient manner. As the programs are present in the virtual memory the space present in the
physical memory remains high. This ensures that the speed of the transaction also increases.
As per the made analysis, it can be stated that virtual machine is the most influential
technology among the 4 since last century. The reason it is being stated that there has been a
need of data analysis for every section of the business operation. With the help of the usage
of the virtual memory the storing and analysis of the data has been getting easier. Again, it
can be stated that processing of the data and structuring of the same gets enhanced with the
usage of Virtual memory. Storing, analysing and prefetching of the stored data can be
performed with the help of virtual memory.
Conclusion
From the above report it can be concluded there has been a drastic emergence of
technology since last 25 years. Proper analysis of all the technologies have been performed in
the above report and it is seen that all of the above technologies have been providing high
advantage to the providing high benefit to the operational process. Out of all the technologies,
Virtual memory stands out as with the help of virtual memory, the issue of physical memory
scarcity can be eliminated. However, it is seen that all the technologies provide unique
advantages toward business operation.

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References
Colwell, B. (2018). ANOTHER TAKE ON RISC. Computer, 51(4), 4-4.
Huang, J., Puli, R. R., Majumder, P., Kim, S., Boyapati, R., Yum, K. H., & Kim, E. J. (2019,
February). Active-Routing: Compute on the Way for Near-Data Processing. In 2019
IEEE International Symposium on High Performance Computer Architecture
(HPCA) (pp. 674-686). IEEE.
Mu, S., Angel, S., & Shasha, D. (2019, March). Deferred Runtime Pipelining for contentious
multicore software transactions. In Proceedings of the Fourteenth EuroSys
Conference 2019 (p. 40). ACM
Rossi, D., Tenentes, V., Reddy, S. M., Al-Hashimi, B. M., & Brown, A. (2017). Exploiting
aging benefits for the design of reliable drowsy cache memories. IEEE Transactions
on Computer-Aided Design of Integrated Circuits and Systems, 37(7), 1345-1357.
Santos, P. C., Alves, M. A., Diener, M., Carro, L., & Navaux, P. O. (2016, February).
Exploring cache size and core count tradeoffs in systems with reduced memory access
latency. In 2016 24th Euromicro International Conference on Parallel, Distributed,
and Network-Based Processing (PDP) (pp. 388-392). IEEE.
Seshadri, V. (2016). Simple DRAM and Virtual Memory Abstractions to Enable Highly
Efficient Memory Systems. arXiv preprint arXiv:1605.06483.
Tagliavini, G., Mach, S., Rossi, D., Marongiu, A., & Benini, L. (2019, March). Design and
Evaluation of SmallFloat SIMD extensions to the RISC-V ISA. In 2019 Design,
Automation & Test in Europe Conference & Exhibition (DATE) (pp. 654-657). IEEE.