Hardware Architecture Report: Analysis of Hardware Components

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Added on  2022/08/15

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The hardware architecture report delves into the core elements of a computing system, emphasizing the relationship between hardware components. It starts by defining the concept of hardware architecture and the distinction between software and hardware platforms. The report then provides an in-depth exploration of various hardware components, including Trusted Platform Module (TPM), Rich Execution Environment (REE), Serial Peripheral Interface (SPI) Flash, Graphics Processing Unit (GPU), Host Controller (HC), Network Interface Controller (NIC), Embedded Controller (EC), persistent memory, and NVME. Each component's function within the system is described in detail, contributing to a comprehensive understanding of how they collectively enable the overall system performance. The report aims to help readers understand hardware systems, their functionalities and the relationship between different components.
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Running head: HARDWARE ARCHITECTURE 1
HARDWARE ARCHITECTURE
Student’s name
University
Date
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HARDWARE ARCHITECTURE 2
In system engineering, hardware architecture is the identification of
physical components of a computer system and how they relate. The
descriptions is often refers to hardware design model, this enables the
designers of hardware components to understand how the modules fit in a
system architecture and also enables the software designers to know
significant information that is required to develop and integrate software
(Klaiber, Bailey & Simon, 2019).
Modern computing system have two separate contracts which are
software and a platform, software are all elements that are required to start
an operating systems and all applications that are used for various task
whereas a platform refers to firmware and hardware that are required for
booting of the system until the point that a software is loaded. The figure
below illustrate some components of a hardware system (Fang, Zou, & Chien,
2019).
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HARDWARE ARCHITECTURE 3
Figure 1. System architecture
The following tables shows major hardware components, description
and its functions in the modern hardware architecture
Hardware
components
Function
Trusted Platform Module
(TPM)
Use for secure data that is store in the system, it
provides a robust device identity.
Rich Execution Environment
(REE)
Ensures that sensitive data is kept, processed and
secured in an isolated and trusted environment (Wang,
Liu, Lin, Lin, & Han, 2019).
Trusted Execution Provides security features such as integrity and
isolated execution
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HARDWARE ARCHITECTURE 4
Environment
Serial peripheral
Interface (SPI) Flash
It is mainly for host processor boot firmware and may
be used for short distance communication (Wang, Wang,
Lu, Lin, & Wang, 2019)
Graphics Processing
Unit (GPU)
It act as the primary output, it may also be used to
assist in high-performance computing.
Host Controller (HC) Used to transfer data from main memory of the
platform to a physical storage,
Network Interface
controller (NIC)
Used to connect a computer to a computer network
Embedded controller
(EC)
Handle variety of systems functions that cannot be
done by an operating system
Persistent memory Use to store data structures
NVME Speed up transfer of data
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HARDWARE ARCHITECTURE 5
References
Fang, Y., Zou, C., & Chien, A. A. (2019). Accelerating raw data analysis with the ACCORDA
software and hardware architecture. Proceedings of the VLDB Endowment, 12(11), 1568-
1582.
Klaiber, M. J., Bailey, D. G., & Simon, S. (2019). A single-cycle parallel multi-slice connected
components analysis hardware architecture. Journal of Real-Time Image
Processing, 16(4), 1165-1175.
Wang, K., Liu, Z., Lin, Y., Lin, J., & Han, S. (2019). Haq: Hardware-aware automated
quantization with mixed precision. In Proceedings of the IEEE conference on computer
vision and pattern recognition (pp. 8612-8620).
Wang, M., Wang, Z., Lu, J., Lin, J., & Wang, Z. (2019). E-LSTM: An Efficient Hardware
Architecture for Long Short-Term Memory. IEEE Journal on Emerging and Selected
Topics in Circuits and Systems, 9(2), 280-291.
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