ENS1161 Computer Fundamentals: Instruction Fetch and Decode Process

This report examines the fundamental processes of instruction fetch and decode within a processor. It begins by explaining the basic structure of a computer system, highlighting the roles of input, output, memory, and the processor. The main body then delves into the sequence of actions a processor undertakes during instruction fetch and decode, detailing the involvement of components such as the processor, memory, input/output units, and system buses. It emphasizes the importance of registers for temporary data storage and the control unit's role in coordinating activities and generating signals. The report also references the roles of the ALU and register arrays. The conclusion summarizes the importance of the components in the instruction execution process. The report aims to provide a clear understanding of how a processor retrieves, interprets, and prepares instructions for execution, laying the groundwork for understanding computer architecture.

Topic: Based on the processor structure given in unit material list and describe the
sequence of actions carried out by the processor during an instruction fetch and decode
include details of all components involved and their function.
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Contents
INTRODUCTION...........................................................................................................................4
MAIN BODY..................................................................................................................................4
Describe the sequence of actions that carried out by process during instruction fetch and
decode details of components......................................................................................................4
CONCLUSION................................................................................................................................4
REFERENCES................................................................................................................................6
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INTRODUCTION
A computer system is an essential part takes input data and processors it’s to produce the
output data. The fundamental processors are based on the programmable logics that support
overall singles on and off as per specified conditions. The report will describe about the structure
of processor that performed different actions which carried out by processor at the time of
instruction fetch and decode.
MAIN BODY
Describe the sequence of actions that carried out by process during instruction fetch and decode
details of components.
A processor needs instruction that require to perform different action on data storage and also
stored in memory. It is mainly consists of microprocessor such as decodes, fetch and execute the
specified operation. It has performed continues process with the help of processor. It uses system
bus to fetch data through instructions and storage data from memory (Strenge, Vogel and
Schack, 2019). Furthermore, it is primarily uses registered for temporary data and generate
significant result or outcome. The register carried out group of memory circuit that can store
binary information with huge amount of speed memory within processor chip. It is high speed
memory within processor chips. For Example- Binary data or information
1 0 0 1 0
Furthermore, digital circuitry that coordinate all different activities in the processors. It
automatically fetch and decode instruction. It also coordinated with the movement of data within
the system. It also provided the signals to other part of system in given processors.
There different type of components used within data fetch and decode within system. it
mainly involves processors, memory, input and output unit, system bus (Xenofontos, Hovardas
and de Jong, 2020). These are essential components that automatically operates overall system in
proper manner.
CONCLUSION
From above discussion, it concluded that memory, input and output units perform different
action in data fetch, decode and execute. It has summarised about the structure of processor that
performed different actions which carried out by processor at the time of instruction fetch and
decode.
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REFERENCES
Book and Journals
Strenge, B., Vogel, L. and Schack, T., 2019. Computational assessment of long-term memory
structures from SDA-M related to action sequences. PloS one. 14(2).
Xenofontos, N.A., Hovardas, T. and de Jong, T., 2020. Inquiry‐based learning and retrospective
action: Problematizing student work in a computer‐supported learning
environment. Journal of Computer Assisted Learning. 36(1). pp.12-28.
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