Computers, Data and Programming: ITC544 Assessment 3, Assignment 1

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ITC544
Computer Organisation and Architecture
ASSESSMENT 3
Assignment 1
Computers, data and programming
Student Name:
Student ID:
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Table of Contents
Answer 1....................................................................................................................................3
A)............................................................................................................................................3
B)............................................................................................................................................4
i).........................................................................................................................................4
ii)........................................................................................................................................5
iii).......................................................................................................................................6
iv).......................................................................................................................................6
C)............................................................................................................................................7
i).........................................................................................................................................7
ii)........................................................................................................................................7
iii).......................................................................................................................................7
Answer 2....................................................................................................................................8
A.)...........................................................................................................................................8
B.).........................................................................................................................................11
Answer 3..................................................................................................................................12
A)..........................................................................................................................................12
B)..........................................................................................................................................12
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Answer 1
A)
Firstly, converting LHS into its equivalent decimal value.
0x6A = (6 X 161) + (A X 160) = 106 ------- (1)
106 is the decimal equivalent so, comparing LHS with RHS we get,
(A = 10)
Now, (152) b conversion into its equivalent expression.
[152] b = (1 X b²) + (5 X b¹) + (2 X b )⁰
[152] b = (b² + 5b + 2) ------- (2)
Solving further the equations (1) and (2),
 (b² + 5b + 2) = 106
 (b² + 5b – 104) = 0
 (b² + 13b - 8b – 104) = 0
 [b [b+13] – 8[b + 13]] = 0
 [b-8][b+13] = 0
 b = 8 /// b = -13
Now, base cannot be -ve,
Therefore, b = 8.
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B)
i)
 Hexadecimal to Decimal conversion
o 0xBAD  hexadecimal number.
o Converting BAD into its equivalent decimal form.
o [BAD]16 = B X 162 + A X 161 + D X 160
---------------------------------------------------------------------
o [BAD]16 = 11 X 162 + 10 X 161 + 13 X 160
-----------------------------------------------------------------------
o [BAD]16 = [2989]10 ------ (1)
 Decimal to 3-base conversion
o Firstly, dividing equation 1 result with 3 for the 3-base representation.
Dividend / 3 Divisor Remainder
2989 996 1
996 332 0
332 110 2
110 36 2
36 12 0
12 4 0
4 1 1
1 0 1
o Taking the remainder
o Taking the reverse order of the remainder.
o Ans = 11002201
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ii)
 Converting 3217 to its equivalent binary form
 Dividing 3217/2
Dividend / 2 Divisor Remainder
3217 1608 1
1608 804 0
804 402 0
402 201 0
201 100 1
100 50 0
50 25 0
25 12 1
12 6 0
6 3 0
3 1 1
1 1 1
 Taking remainder & writing the reverse order.
110010010001  binary equivalent value of 3217.
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iii)
 1235  decimal number
 Converting 1235 into octal
 Performing 1235/8
Dividend / 8 Divisor Remainder
1235 154 3
154 19 2
19 2 3
2 2 2
 Taking remainder & writing the reverse order.
2323  octal equivalent value of 1235.
iv)
The decimal value of 21.218  21218/1000
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C)
i)
Highest Number Possible = 23-1 -1 = 3  2p-1-1
Lowest Number Possible = - (23-1 -1) = -3  - (2p-1-1)
ii)
Highest Number Possible = 23-1 -1 = 3  2p-1-1
Lowest Number Possible = -23-1 = -4  -(2p-1 )
iii)
Highest Number Possible = 23-1 -1 = 3  2p-1-1
Lowest Number Possible = - (23-1 -1) = -3 - (2p-1-1)
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Answer 2
A.)
A MARIE program to calculate the Fibonacci value up to n was written & is shown below.
With this program, the user will be able to see the nth value of the Fibonacci series.
ORG 000
INPUT IP /For a user to provide an input value
SUBT TWO /Subtract two
PRINT, STORE R /After R is processed, store the value and
show output
CLEAR
ADD F1
/Accumulator and F1 added
ADD F2
/Accumulator and F2 added
STORE TOTAL
/F1 + F2 result
/Equalizing F1 & F2
LOAD F2
/value of F2 loaded to AC
STORE F1
/value of F1 is stored
LOAD TOTAL
/value of total loaded to the accumulator
STORE S2
/S2 value saved
LOAD R
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/Register R value loaded
SUBT ONE
/reduce R value by one unit
SKIPCOND 000
/ accumulator<0, avoid-condition 000
JUMP PRINT
/Show result & being looping
LOAD TOTAL
/value of total loaded to Accumulator
OUTPUT
/view o-p
HALT
/halt the process
IP, DEC 0
ONE, DEC 1
TWO, DEC 2
R, DEC 0
F1, DEC 0
F2, DEC 1
TOTAL, DEC 0
The above-designed code produces the correct values of the Fibonacci series.
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Figure 1: Example 1
Figure 2: Example 2
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Figure 3: Example 3
B.)
The maximum value for which the created program outputs an accurate value is 2147483647.
Inaccurate results are shown if the value is further increased.
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Answer 3
A) For example, when any of the key is pressed or on the other hand when mouse moved, at
the same time interruption occures. For instance, if any key is pressed mouse moved, external
hardware interrupts are generated. When a program requires disk I/O, interrupts are generated
and these types of interrupts are called software interrupts. The computer may be interrupted
many times each second by an internal timer so that the time of the day stays updated or
when the value of time is required by another application. In the event of an interruption, the
control is transmitted to the OS that defines the action. The higher the priority, the quicker the
interrupt is served.
In a case when multiple interrupts are needed to be served, fundamentally two ways are
possible:
 Priority assignment: The processor only accepts the highest priority interrupts in case
of more lines. Each interrupt line can be allocated preferences during the design stage.
A polling software can be used to determine priority based on the order in which
modules are examined.
 Disabling interrupts: Another approach to deal with multiple interrupts is to disable
the interrupt request signal. Any further interrupts will be disabled if an interrupt is
processed. So if a file is executed and a break occurs, it is disabled immediately. This
is an easy method to manage well with multiple interrupts.
B) There are various points on which the multi-bus architecture is advantageous over the
single-bus architecture.
 Multi-bus architecture has a greater speed and performance.
 More convenient
 Connects each of the devices to own bus which in turn means that every device has its
own bus
 The faster rate of transferring data  every device.
 Transferring of data don’t get interrupted.
 The cost of a multi-bus is higher but the cost is worth it.
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