ITC544: Computer Organization and Architecture - Semester 1, 2024
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ITC544
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Contents
Question 1........................................................................................................................................3
A).................................................................................................................................................3
b)..................................................................................................................................................3
i)...............................................................................................................................................4
ii)..............................................................................................................................................4
iii).............................................................................................................................................5
iv).............................................................................................................................................6
c)..................................................................................................................................................6
Question 2........................................................................................................................................7
a)..................................................................................................................................................7
b)................................................................................................................................................11
Question 3......................................................................................................................................11
a)................................................................................................................................................11
b)................................................................................................................................................12
Question 1........................................................................................................................................3
A).................................................................................................................................................3
b)..................................................................................................................................................3
i)...............................................................................................................................................4
ii)..............................................................................................................................................4
iii).............................................................................................................................................5
iv).............................................................................................................................................6
c)..................................................................................................................................................6
Question 2........................................................................................................................................7
a)..................................................................................................................................................7
b)................................................................................................................................................11
Question 3......................................................................................................................................11
a)................................................................................................................................................11
b)................................................................................................................................................12

Question 1.
A)
Answer: Given;
(152) with base (b) = 0x6A …………..(i)
In above equation, 0x6A is shown as hexadecimal
So, the value of A = 10 in hexadecimal
Hence,
6A = {(6)x(16)1} + {(A)x(16)0}
= [96 + 10]
= 106
And, 152 with base b = {1xb² + 5xb¹ + 2xb⁰}
= {b² + 5b + 2}
Now, using above value in equation (i), we get;
152 with base b (equal to) = {b² + 5b + 2} = 106
Now, solving the equation;
So, {b² + 5b + 2} = 106
{b² + 5b} = 106-2 = 104
{b² + 5b – 104} = 0 (Zero)
{b² + 13b - 8b – 104} = 0 (Zero)
{b(b+13) - 8(b + 13)} = 0 (Zero)
{(b-8)*(b+13)} = 0 (Zero)
Thus, b= 8 or -13 but -13 is not possible so, b= 8 is the correct result.
A)
Answer: Given;
(152) with base (b) = 0x6A …………..(i)
In above equation, 0x6A is shown as hexadecimal
So, the value of A = 10 in hexadecimal
Hence,
6A = {(6)x(16)1} + {(A)x(16)0}
= [96 + 10]
= 106
And, 152 with base b = {1xb² + 5xb¹ + 2xb⁰}
= {b² + 5b + 2}
Now, using above value in equation (i), we get;
152 with base b (equal to) = {b² + 5b + 2} = 106
Now, solving the equation;
So, {b² + 5b + 2} = 106
{b² + 5b} = 106-2 = 104
{b² + 5b – 104} = 0 (Zero)
{b² + 13b - 8b – 104} = 0 (Zero)
{b(b+13) - 8(b + 13)} = 0 (Zero)
{(b-8)*(b+13)} = 0 (Zero)
Thus, b= 8 or -13 but -13 is not possible so, b= 8 is the correct result.
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b)
i)
Answer: Given;
0xBAD
We know that, 0x means it is written in hexadecimal form, so the base for (BAD) is 16
Now, calculating the value for BAD, we get;
BAD = {Bx162 + Ax161 + Dx160 }
= {Bx256 + Ax16 + Dx1}
= {11x256 + 10x16 + 13x1}
= {2989} (which is decimal number with base 10)
Now, converting calculated value into base 3, we get;
2989 / 3 = 996 + 1
996/3 = 332 + 0
332/3 = 110 + 2
110/3 = 36 + 2
36/3 = 12 + 0
12/3 = 4 + 0
4/3 = 1 + 1
1/3 = 0 + 1
Now, using remainder values from above calculation, we get;
2989 / 3 = (11002201)3
Thus, (BAD)16 = (11002201)3 which is correct answer.
i)
Answer: Given;
0xBAD
We know that, 0x means it is written in hexadecimal form, so the base for (BAD) is 16
Now, calculating the value for BAD, we get;
BAD = {Bx162 + Ax161 + Dx160 }
= {Bx256 + Ax16 + Dx1}
= {11x256 + 10x16 + 13x1}
= {2989} (which is decimal number with base 10)
Now, converting calculated value into base 3, we get;
2989 / 3 = 996 + 1
996/3 = 332 + 0
332/3 = 110 + 2
110/3 = 36 + 2
36/3 = 12 + 0
12/3 = 4 + 0
4/3 = 1 + 1
1/3 = 0 + 1
Now, using remainder values from above calculation, we get;
2989 / 3 = (11002201)3
Thus, (BAD)16 = (11002201)3 which is correct answer.
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ii)
Answer:
Given; 3217 which has base 7
So, converting it into base 10, we get;
(321)7 = {(3x72) + (2x71) + (1x70)} with base 10
= {(3x49) + (2x7) + (1x1)} with base 10
= {147 + 14 + 1} with base 10
= 162 with base 10
Now, converting above result from base 10 to base 2 (Binary) using division method in
which remainder is used for the final result, we get;
162 = 81 and 0
81 = 40 and 1
40 = 20 and 0
20 = 10 and 0
10 = 5 and 0
5 = 2 and 1
2 = 1 and 0
1 = 0 and 1
Now, taking all the values of remainder, we get;
(162)10 = (10100010)2
Thus, the (10100010) is the correct conversion with base 2 (binary) for (321)7
iii)
Answer:
Answer:
Given; 3217 which has base 7
So, converting it into base 10, we get;
(321)7 = {(3x72) + (2x71) + (1x70)} with base 10
= {(3x49) + (2x7) + (1x1)} with base 10
= {147 + 14 + 1} with base 10
= 162 with base 10
Now, converting above result from base 10 to base 2 (Binary) using division method in
which remainder is used for the final result, we get;
162 = 81 and 0
81 = 40 and 1
40 = 20 and 0
20 = 10 and 0
10 = 5 and 0
5 = 2 and 1
2 = 1 and 0
1 = 0 and 1
Now, taking all the values of remainder, we get;
(162)10 = (10100010)2
Thus, the (10100010) is the correct conversion with base 2 (binary) for (321)7
iii)
Answer:

Given; 1235 which has base 5
Now, converting given value with base 5 to decimal number with base 10, we get;
(123)5 = {(1x52) + (2x51) + (3x50)} with base 10
= {(1x25) + (2x5) + (3x1)} with base 10
= {(25) + (10) + (3)} with base 10
= {38} with base 10
Then, converting above value with base 10 to base 8, we get;
38 = 4 and 6
4 = 0 and 4
So, using above calculated value and taking remainders, we get;
(123)5 = {38} with base 10 = (46)8
Thus, 46 is the correct answer with base 8 for (123)5.
iv)
Answer:
Given, 21.218 which has base 8
First, Calculation for part before decimal point;
(21)8 = {(2x81) + (1x80)}
= {16 + 1}
= 17
Now, Calculation for part after decimal point;
(.21)8 = {(2x8-1) + (1x8-2)}
= {0.25 + 0.015625}
= {0.265625}
Thus, combining above two values, we get;
(21.21)8 = {17 + 0.265625}
= 17.265625 with base 10 (Decimal representation)
Now, converting given value with base 5 to decimal number with base 10, we get;
(123)5 = {(1x52) + (2x51) + (3x50)} with base 10
= {(1x25) + (2x5) + (3x1)} with base 10
= {(25) + (10) + (3)} with base 10
= {38} with base 10
Then, converting above value with base 10 to base 8, we get;
38 = 4 and 6
4 = 0 and 4
So, using above calculated value and taking remainders, we get;
(123)5 = {38} with base 10 = (46)8
Thus, 46 is the correct answer with base 8 for (123)5.
iv)
Answer:
Given, 21.218 which has base 8
First, Calculation for part before decimal point;
(21)8 = {(2x81) + (1x80)}
= {16 + 1}
= 17
Now, Calculation for part after decimal point;
(.21)8 = {(2x8-1) + (1x8-2)}
= {0.25 + 0.015625}
= {0.265625}
Thus, combining above two values, we get;
(21.21)8 = {17 + 0.265625}
= 17.265625 with base 10 (Decimal representation)
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c)
Answer:
Given; word size = 3 bits
So, the largest number which can be used is 3 (in 3bits)
Hence, primary representation for 3 bits = 011
i) For, one’s compliment;
Representation will be (one’s compliment) = 100
ii) For, two’s compliment;
Representation will be (two’s compliment) = 101
iii) For signed magnitude;
Signed Magnitude = 011 and 0 has positive value.
Now, for smallest number which is -3;
Primary representation for -3 bits = 111
i) For, one’s compliment;
Representation will be (one’s compliment) = 000
ii) For, two’s compliment;
Representation will be (two’s compliment) = 001
iii) For signed magnitude;
Signed Magnitude = 111 and 1 has negative value.
Question 2.
a)
Answer:
ORG 000 /Starting
INPUT USER /Achieve User's Output
SUBT TWO /Reduce 2
Answer:
Given; word size = 3 bits
So, the largest number which can be used is 3 (in 3bits)
Hence, primary representation for 3 bits = 011
i) For, one’s compliment;
Representation will be (one’s compliment) = 100
ii) For, two’s compliment;
Representation will be (two’s compliment) = 101
iii) For signed magnitude;
Signed Magnitude = 011 and 0 has positive value.
Now, for smallest number which is -3;
Primary representation for -3 bits = 111
i) For, one’s compliment;
Representation will be (one’s compliment) = 000
ii) For, two’s compliment;
Representation will be (two’s compliment) = 001
iii) For signed magnitude;
Signed Magnitude = 111 and 1 has negative value.
Question 2.
a)
Answer:
ORG 000 /Starting
INPUT USER /Achieve User's Output
SUBT TWO /Reduce 2
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PRINT, STORE P /Load P and then store the AC value
CLEAR
ADD M1 /To add M1 in AC value
ADD M2 /To add M2 in AC value
STORE TOTAL /The result of addition for M1 and M2 values
/here M1 = M2
LOAD M2 /To load M2 in the Ac
STORE M1 /To store value in M1
LOAD TOTAL /To load TOTAL value to AC value
STORE M2 /To store M2 in AC
LOAD P /To load P register for action
SUBT ONE /Subtracted 1 from P
SKIPCOND 000 /Condition if the (AC<0) then skip the cond 000 to for processing
JUMP PRINT /To start loop for printing
LOAD TOTAL /Achieve and then load the TOTAL value in AC value
OUTPUT /Output value
HALT /To halt the running Process
CLEAR
ADD M1 /To add M1 in AC value
ADD M2 /To add M2 in AC value
STORE TOTAL /The result of addition for M1 and M2 values
/here M1 = M2
LOAD M2 /To load M2 in the Ac
STORE M1 /To store value in M1
LOAD TOTAL /To load TOTAL value to AC value
STORE M2 /To store M2 in AC
LOAD P /To load P register for action
SUBT ONE /Subtracted 1 from P
SKIPCOND 000 /Condition if the (AC<0) then skip the cond 000 to for processing
JUMP PRINT /To start loop for printing
LOAD TOTAL /Achieve and then load the TOTAL value in AC value
OUTPUT /Output value
HALT /To halt the running Process

/Initialization of Process
USER, DEC 0
TWO, DEC 2
ONE, DEC 1
P, DEC 0
M1, DEC 0
M2, DEC 1
TOTAL, DEC 0
When input = 7 by the user, output will be 13;
When input = 15 by the user, output will be 610;
USER, DEC 0
TWO, DEC 2
ONE, DEC 1
P, DEC 0
M1, DEC 0
M2, DEC 1
TOTAL, DEC 0
When input = 7 by the user, output will be 13;
When input = 15 by the user, output will be 610;
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When input = 20 by the user, output will be 6765;
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b)
Answer:
The maximum value which can be calculated by the simulator is 2147483647 and if the user will
enter value above 2147483647, simulator will gave incorrect answer and will not work.
Question 3.
a)
Answer: Interrupts is referred to the signals used by computer system for the communication in
between processor and I/O devices and start or stop any process immediately after receiving any
interrupt signal from the I/O device. Depending upon the major components used in computer
system, all interrupt signals has been classified in to 2 types:
Hardware interrupts: In this type of interrupts, signals has been generated by external
or hardware devices.
Answer:
The maximum value which can be calculated by the simulator is 2147483647 and if the user will
enter value above 2147483647, simulator will gave incorrect answer and will not work.
Question 3.
a)
Answer: Interrupts is referred to the signals used by computer system for the communication in
between processor and I/O devices and start or stop any process immediately after receiving any
interrupt signal from the I/O device. Depending upon the major components used in computer
system, all interrupt signals has been classified in to 2 types:
Hardware interrupts: In this type of interrupts, signals has been generated by external
or hardware devices.

Software interrupts: In this type of interrupts, signals has been generated by software in
use on the computer system and their instructions.
Two approaches to handle multiple interrupts: In order to handle multiple interrupts
generated at a same time for the processor in a computer system, different methods has been
developed to manage all those interrupts signals. The two major methods has been given below:
To disable or suspend other interrupts while any interrupt is under process by the processor.
Those signals which were on hold will get checked after sometime by the processor when that
signal will be enabled again for the process. All these activities are managed by the interrupt
handler in order to hold or enable any interrupt signal to be used by the processor for effective
management of multiple interrupts in the computer system.
Setting priority to different interrupts: In this type of method to handle multiple interrupts which
are generated by different devices at a same time for the processor then priority is set for all the
generated interrupts depending upon the action required. In this way, all the generated interrupts
are handled in a managed way on the basis of priority set for those interrupts by the interrupt
handler.
b)
Answer: In every computer system, buses plays significant role for the communication as well
as signal transfer from one point to other as well as the processor of the device. These buses can
be divided into two type depending upon architecture of the bus used in the computer system.
Two type of bus architecture are:
Single bus architecture
Multiple bus architecture
In comparison with single bus architecture, multiple bus architecture has very high advantages in
the computer system due to improved efficiency and high performance.
Table 1: Comparison table
Criteria Single bus Multiple bus
Speed Low speed High speed
Efficiency Low efficiency High efficiency
use on the computer system and their instructions.
Two approaches to handle multiple interrupts: In order to handle multiple interrupts
generated at a same time for the processor in a computer system, different methods has been
developed to manage all those interrupts signals. The two major methods has been given below:
To disable or suspend other interrupts while any interrupt is under process by the processor.
Those signals which were on hold will get checked after sometime by the processor when that
signal will be enabled again for the process. All these activities are managed by the interrupt
handler in order to hold or enable any interrupt signal to be used by the processor for effective
management of multiple interrupts in the computer system.
Setting priority to different interrupts: In this type of method to handle multiple interrupts which
are generated by different devices at a same time for the processor then priority is set for all the
generated interrupts depending upon the action required. In this way, all the generated interrupts
are handled in a managed way on the basis of priority set for those interrupts by the interrupt
handler.
b)
Answer: In every computer system, buses plays significant role for the communication as well
as signal transfer from one point to other as well as the processor of the device. These buses can
be divided into two type depending upon architecture of the bus used in the computer system.
Two type of bus architecture are:
Single bus architecture
Multiple bus architecture
In comparison with single bus architecture, multiple bus architecture has very high advantages in
the computer system due to improved efficiency and high performance.
Table 1: Comparison table
Criteria Single bus Multiple bus
Speed Low speed High speed
Efficiency Low efficiency High efficiency
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