Capstone Project: Automated Power Factor Correction with PLC System

This report details a capstone project focused on automated power factor correction using Programmable Logic Controllers (PLCs). The project addresses the problem of reduced power factor in AC power systems due to inductive loads. The report outlines the methodology, including the use of an interfacing circuit with current and phase angle detectors, and the implementation of a PLC to control capacitor banks. The objectives are to automatically correct the power factor, maintaining it at 0.9 or greater. The report covers the design of the hardware components, including the PLC module, switching circuits with relays and triacs, and the calculations for power factor correction. It also includes software implementation details, such as ladder diagrams and flowcharts for PLC control. The project aims to improve power system efficiency by automatically adjusting the power factor through the addition or removal of capacitors based on the load requirements. The report concludes with a discussion of the project's outcomes, including the development of an operating prototype and a detailed drawing package, along with the presentation of the design choices and calculations.

ELECTRICAL POWER
Name of Student
Institution Affiliation

TABLE OF CONTENT
TABLE OF CONTENT..................................................................................................................2
TABLE OF FIGURES....................................................................................................................3
LIST OF TABLES.........................................................................................................................3
INTRODUCTION....................................................................................................................4
Problem Statement................................................................................................................4
Background Information.......................................................................................................5
Objectives and Criteria.........................................................................................................5
2.0 METHODOLOGY AND TIMELINE.........................................................................................5
2.1 Interfacing Circuit...........................................................................................................6
2.2 Programmable Logic Controller (PLC)..........................................................................9
2.3 Switching Circuits........................................................................................................11
2.4 calculation for the pfc.......................................................................................................12
2.5 Software Implementation..................................................................................................16
Project Timeline..................................................................................................................20
Resources Required............................................................................................................20
5.0 CONCLUSION................................................................................................................21
6.0 REFERENCES.....................................................................................................................22
APPENDICES........................................................................................................................23
Work breakdown structure (WBS).....................................................................................23
Gantt chart..........................................................................................................................23
Lit Review...........................................................................................................................24

TABLE OF FIGURES
Figure 1: Showing a schematic diagram of the experimental set (Khanchi, 2013).................5
Figure 2: Showing the circuit diagram with power factor correction devices (Khanchi, 2013).
..................................................................................................................................................6
Figure 3: Showing the phasor diagram for the electrical power supply line system (Khanchi,
2013).......................................................................................................................................6
Figure 4: Showing the phasor diagram between the reactive load and the capacitive load
(Matsutani, 2016)...................................................................................................................7
Figure 5: Showing phase angle detector (Matsutani, 2016)....................................................8
Figure 6: Showing phase angle detector (Marcinkiewicz, 2017)............................................9
Figure 7: Showing a PLC module for power factor correction(Singh, 2012)........................10
Figure 8: Showing Capacitor banks connected through PLC (Abdalla, 2010)......................10
Figure 9: Showing Circuit with Triac Switch Instead of the relay (Abdalla, 2010)..............11
Figure 10: Showing the overall circuit diagram for the PLC power factor correction (Abdalla,
2010)......................................................................................................................................12
Figure 11: Showing phasor diagram before compensation....................................................14
Figure 12: Showing phasor diagram after compensation.......................................................15
Figure 13: Showing a ladder diagram for PLC control ( Hangseok,2012 )...........................18
Figure 14: Showing the flowchart for power factor correction using PLC controller
( Hangseok,2012 )..............................................................................................................19
Figure 15: Showing power factor for the compensated and non-compensated against the
current ( Hangseok,2012 ).................................................................................................19
Figure 16: Showing Voltage and current waveforms ( Hangseok,2012 )............................20
Figure 17: Showing Comparator op-amps and XOR resultant waveforms (Hangseok, 2012).
................................................................................................................................................20
Figure 18: Showing the Gantt chart........................................................................................24
LIST OF TABLES
Table 1: Showing control scheme for switching on capacitors..................................................................

INTRODUCTION
Due to the presence of several inductive loads along with the power system
like the transformers and inductive motors the value of the reactance will highly
increase. When the reactance is higher than reactive power will be higher which result
in unwanted power loss in the power line. Therefore this need to look for a way of
reducing the higher reactive power. When the reactive power is higher it means that
the power factor is lower. So boosting of the power factor will reduce the reactance
which will hence reduce the reactive power. This can be done by adding the
capacitors to the power line system. The addition of the capacitance can now be added
automatically depending on the required through the use of programmable logic
controllers.
Problem Statement
When AC power is transmitted, the induction in the system causes a reduction
of the power factor. Adding an inductive load further affects the power factor. For this
reason, capacitors can be used to compensate for the effect of them in the power line
system. This project will use automated PLCs to add or remove capacitors to maintain
or adjust the power factor in the power line system and to stabilize the efficiency.
Background Information
PLC is a computer-based software which is employed in controlling several
automated tasks. The use of PLC makes work easier as there is no need for human
intervention in controlling the system like the addition of capacitor bank into the
power line to adjust the power factor to the required level. The PLC system is a
smaller device and more efficient to use as compared to human being which can make

some mistakes due to the calculation of the required amount of capacitor required for
the correction. This paper hence addresses power factor correction in the power line
system with the induction motor as the reference point. The cause of the lower power
factor in the power line system is the nature of the load which is the inductive load.
Objectives and Criteria
The objective of this project is to automatically correct the power factor
through the use of programmable logic controllers. This concept is made possible
through the addition of capacitors which are connected into the power supply circuit.
The controller will connect the required amount of capacitance according to the power
factor required in the system.
2.0 METHODOLOGY AND TIMELINE
The hardware of this includes the three-phase supply, PLC, capacitor bank for 3
phase, interfacing circuit. These can be illustrated schematically as below;
Figure 1: Showing a schematic diagram of the experimental set (Khanchi, 2013).
2.1 Interfacing Circuit
The interfacing circuit consists of 2 key components which are the current peak
detector and the phase angle detector (Arya, 2012). Most supply system must have
capacitor banks to reduce the reactance and reactive power, the circuit can hence be
summarized as below;

Figure 2: Showing the circuit diagram with power factor correction devices (Khanchi,
2013).
The phase angle detector is very significant here since the power factor is the Cos θ
between the active power and the apparent power as illustrated by the diagram below;
Figure 3: Showing the phasor diagram for the electrical power supply line system
(Khanchi, 2013).
Therefore the phase angle measuring circuit system will help in determining the
angle θ and take correction measure on the angle simply by reducing the reactive
power through adding some capacitor (this is done automatically by the PLC through
connecting capacitor banks into the power supply circuit) (Matsutani, 2016). When the
reactive power is reduced then angle θ will also be reduced hence higher Power factor

/ Cosθ. The automatic connection of the capacitor into the power line system help in
the reduction of the reactive power as illustrated in equation 1 below, and this is also
explained further in the below diagram;
Figure 4: Showing the phasor diagram between the reactive load and the capacitive
load (Matsutani, 2016).
XT= XL-XC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
And the reactive power is obtained using the below equation 2;
Q= IX2XT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Where Q is the reactive power, XT is the resultant reactance of the system in ohms, IX
is the reactance current.
The phase angle detector is hence illustrated using the following diagram;

Figure 5: Showing phase angle detector (Matsutani, 2016).
Phase angle measuring unit which is shown in figure five above comprises of the
comparison stage, converting stage, XOR stage and the clipping stage (Deaver, 2010).
For the first stage in the above diagram, the input sinusoidal current is changed to the
square waveform. Through the use of the comparator op-amp. In the same way, the
measured voltage which is in the sinusoidal waveform is converted into a square
waveform. The voltage and the current square waveforms are then compared logic
comparison of the XOR is done (Gumaer, 2017). At the final stage through taking the
stage 2 output. All the negative present peak waveform are clipped at this stage. The
results from the port six as shown in figure six below is fed up to non-inverting
terminals of the peak detector circuit. The output is then conditioned to be a square
waveform (Marcinkiewicz, 2017). This square wave amplitude is trapped in capacitor
banks which then results in a signal. The resultant signal is then fed to the PLC analog
input port. The signal detected is then scaled appropriately so as to obtain the required
results.

Figure 6: Showing phase angle detector (Marcinkiewicz, 2017).
2.2 Programmable Logic Controller (PLC)
The correction of the power factor is always driven by S7-300 PLC which is
illustrated using figure 7, this model has several models like CPU, digital input, power
supply, digital output and also the ADC ( Analogue-digital converter). The digital
input module has the following specifications; 24 VDC for which for the logic “0” the
voltages ranges from -3 to 5 VDC while for the logic “1” which ranges from 13 to 30
VDC. There is also an analog module which is a 2 channel and also a 12 bit ADC
(Analog to digital converter). The digital output of the PLC has 24VDC and a current
of 0. 5 VDC.
For the power factor correction, the two output of the interfacing can be fed to
the PLC through the following way; The results of the measured phase angle
measuring unit is fed to the digital input module of the programmable logic controller
(Santo, 2013). Here the output of the peak current detector is fed to the ADC module.
The controller will hence calculate the lagging reactive power of the power line
system and with the obtained results the PLC will take an appropriate decision and
gives a signal to the digital output module (Abdalla, 2010). In the digital output
module there is a switching circuit which is connected to the sequence of capacitors in

the capacitor banks as illustrated in the 8 and the PLC module is illustrated in figure 7
below;
Figure 7: Showing a PLC module for power factor correction(Singh, 2012)
Figure 8: Showing Capacitor banks connected through PLC (Abdalla, 2010).
2.3 Switching Circuits
The automated switching here is conducted using the relay switches which are
energized directly through the signal fed to the digital output module of the PLC. It is
highly possible to detect any failure in the switch due to these different sets of ports
(Abdalla, 2010). For the use of the harmonic free operation, the triacs can be installed
as illustrated in the figure below 9 below. For this technique the voltage transformer

is required for the operation, the use of the voltage transformer is to provide a
crossing detection to the power line system (Alam, 2016). This technique is very
significant in the prevention of the transients, harmonics and oscillations from
occurring. In addition, three voltage transformers and current transformers are used
independently in case phase compensation need to be achieved. The triac switch is
illustrated in the following diagram;
Figure 9: Showing Circuit with Triac Switch Instead of the relay (Abdalla, 2010).

Figure 10: Showing the overall circuit diagram for the PLC power factor correction (Abdalla, 2010).
2.4 calculation for the pfc
The inductive reactance is given by 3 below;
XL = 2πfL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
XC = 1
2 πfC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Taking the initial power factor to be 0.8 and the targeted power factor is 0.95 (which
is more than 0.9)
Other design specifications are given below;

Voltage for the three phase is 415 V, and the no load current for the inductive motor is
given as L1=L2=L3= 5 A. And the configuration of the inductive motor is taken as
delta.
Therefore the 3 phase apparent power can be calculated using the following equation;
P= 3 × VPH
×IPH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
P= 3× 41 5
√3 ×5
P=3600 VA
Active power is obtained as below;
P= 3600 × Cos θ
P= 3600 × 0.8
P = 2880
From the above calculations we can obtain the reactance as below
Cos θ = 0.8
θ= 36.860

Figure 11: Showing phasor diagram before compensation
Reactive power can be obtained through Pythagoras theorem
X = √Z2−P2
X = √ 36002−28802
X = √ 5120000
X = 2262.74 Ω
Calculation of the change in the reactance
Cos θ = 0.95
θ = 18.1940
Tan θ= Opp
Adj
Tan 18.194 = X
2880
X= 2880 Tan 18.194

X = 946.56 Ω
Change in reactance can then be calculated as below;
X= (2262.74 -946.56) Ω = 1316 Ω
The phasor diagram is then drawn and the difference can be easily seen.
Figure 12: Showing phasor diagram after compensation
The reduction of the reactance of 1316 Ω will all be for the addition of a capacitor
automatically through the use of the PLC.
From equation 4 above;
XC = 1
2 πfC
XC = 1
2 πfC = 1316

1
2× 3.142×50 × C = 1316
C= 0.000002418 F
C =2.418 μF
And since there were three capacitors required to make a capacitor bank then we can
divide 2.418μF by 3 and connect all these 3 capacitors in parallel.
Each capacitor will hence have a capacitance of 0.80688μF.
2.5 Software Implementation
The power factor which is suggested in the design is read out through measuring unit
then read value is then checked whether the current reading of the power factor showing the
measuring unit is the same to the required value of the power factor. If the desired value of
power factor then there will be two cases to be checked. Firstly the current value of the power
factor is equal to the desired value. And in the second way, the values are different, therefore
there is a higher need to correct the lower power factor by connecting the required value of
the capacitance in the circuit (Hangseok, 2012). The output signal from the PLC will be
generated depending on the OFF/ON status of the PLC inputs. The control scheme for
switching on capacitors is illustrated in the table below;
Table 1: Showing control scheme for switching on capacitors
Input pattern 0.8068 8 μF
Status
0.8068 8 μF
Status
0.8068 8μF
Status
Total
Capacitance in
μF
1 0 0 0 0.0
2 0 0 1 0.80688
3 0 1 0 0.80688
4 0 1 1 1. 61376

5 1 0 0 0.80688
6 1 0 1 1. 61376
7 1 1 0 1. 61376
8 1 1 1 2.418
For the power factor correction, the capacitance is 0 when the pattern is at position 1. The
capacitance is 0.80688 μF when the pattern is at position 2, 3, 5 which means that for
these patterns there is only one capacitor connected to the supply line. The
capacitance is 1. 61376 μF when the pattern is at 6 and 7 which mean only two
capacitors are connected. And the capacitance is at 2.418 μF when all the three
capacitors are connected.
The ladder diagram can hence be drawn for control as below where beach rung has a different
operation.
The first rung is for the generation of the counter pulse
The second rung is for the RELAY 1 activation
The third rung is for the RELAY 2 activation
The fourth rung is for the RELAY 3 activation

Figure 13: Showing a ladder diagram for PLC control ( Hangseok,2012 ).
After programming the ladder diagram in the screenshot above, this ladder diagram makes the
operation of the PLC system to operate in the following sequence given in the flowchart
below;

Figure 14: Showing the flowchart for power factor correction using PLC controller ( Hangseok,2012 ).
The obtained square waves for the voltage and the current inputs are given to the 2
comparator op-amps. The waveform for both the power factor corrected and the one which
is not compensated against the load correct is illustrated in the diagram below;
Figure 15: Showing power factor for the compensated and non-compensated against the current
( Hangseok,2012 ).
The resultant waveform illustrating the phase angle difference between the current and the
voltage diagram is illustrated using the following diagrams:

Figure 16: Showing Voltage and current waveforms ( Hangseok,2012 ).
Figure 17: Showing Comparator op-amps and XOR resultant waveforms (Hangseok, 2012).
Project Timeline
The timeline of the implementation is anticipated to take about six months, this
timeline is enough for designing of the PLC through programming the software and
uploading this program to the PLC module and make the other required circuitry.
Resources Required
The required resources for this project is the perfect use of the PLC program which
will be installed in the PLC module. And the concept of the capacitors and the inductors
which will help in reduction of the reactive power to boost the power factor.

5.0 CONCLUSION
The use of the PLC in an induction motor (supply system) in power factor correction
is a very significant project which helps in saving the cost of power as it conserves the power
through reducing the reactive power. The reactive power is reduced by reducing the reactance
by adding more capacitance into the circuit. The addition of the capacitor into the circuit is
done automatically through the use of the PLC which connect the required amount of the
capacitance into the circuit. The PLC will check the power current power factor and compare
it against the desired power factor. In case the checked power factor is less than the desired
power factor. It will send the signal to the triac switching device which will hence switch the
capacitor by connecting the required amount of capacitor into the system. The PLC employed
has advantages for the power factor correction to other controllers is that with PLC there is no
big change in the already installed hardware part (circuitry) to cope with several reactance
ratings. What can be changed in this system are the capacitors required and the static
switches.

6.0 REFERENCES
Abdalla, I. I., Rao, K. R., & Perumal, N. (2010, November). Harmonics mitigation and power
factor correction with a modern three-phase four-leg shunt active power filter. In 2010
IEEE International Conference on Power and Energy (pp. 156-161). IEEE.
Alam, M., Eberle, W., Gautam, D. S., & Botting, C. (2016). A soft-switching bridgeless AC–DC
power factor correction converter. IEEE Transactions on Power Electronics, 32(10),
7716-7726.
Arya, S. R., Singh, B., Chandra, A., & Al-Haddad, K. (2012, December). Power factor
correction and zero voltage regulation in distribution system using DSTATCOM.
In 2012 IEEE International Conference on Power Electronics, Drives and Energy
Systems (PEDES) (pp. 1-6). IEEE.
Deaver, B. J., Radtke, W. O., & Berkman, W. H. (2010). U.S. Patent No. 7,804,280.
Washington, DC: U.S. Patent and Trademark Office.
Gumaer, T. (2017). U.S. Patent No. 9,548,794. Washington, DC: U.S. Patent and Trademark
Office.
Hangseok, C. H. O. I. (2012). U.S. Patent No. 8,098,505. Washington, DC: U.S. Patent and
Trademark Office.
Khanchi, S., & Garg, V. K. (2013). Power factor improvement of induction motor by using
capacitors. International Journal of Engineering Trends and Technology (IJETT), 4(7),
2967-2971.
Marcinkiewicz, J. G., Bockhorst, K., & Green, C. E. (2017). U.S. Patent Application
No. 15/487,175.
Matsutani, T. (2016). U.S. Patent No. 9,369,178. Washington, DC: U.S. Patent and
Trademark Office.
Notohamiprodjo, H., & Lin, J. (2010). U.S. Patent No. 7,733,678. Washington, DC: U.S.
Patent and Trademark Office.
Santo, H., Schindler, M. D., Sangam, D., & Dhayagude, T. (2013). U.S. Patent No. 8,441,199.
Washington, DC: U.S. Patent and Trademark Office.
Singh, B., Singh, S., Chandra, A., & Al-Haddad, K. (2011). Comprehensive study of single-
phase AC-DC power factor corrected converters with high-frequency isolation. IEEE
transactions on Industrial Informatics, 7(4), 540-556
APPENDICES
Work breakdown structure (WBS)
The work breakdown structure of this project is as below;

The first month of the project involves the programming of the PLC to ensure that the ladder
program works effectively as required. During the second month all the required calculation
and the design for the power factor for the PFC. The third and the fourth month is to do the
circuitry of the PLC connection and all the required circuitry. The fifth month involves the
testing of the project while the last month is the final connection of the project.
Gantt chart
The below is the Gantt chart for the project
Figure 18: Showing the Gantt chart
Lit Review
The inductive load nature in the power system like for the transformers,
electric discharge lamps, heating finance, and induction motors makes it ideal to use
PLC for the correction of the power factor through the use of the capacitor bank to
help reduce the reactive power. Lower power factor always results to increase in the
magnitude of the drawn current in the system (hence higher active power loss). The
lower the power factor the higher the load current. Because of the lower power factor
reactive power (kVA) rating for any appliance has to be higher. And because the
KVA rating of the electrical appliance is inversely proportional power factor that will
result in the higher size of the appliance hence higher cost of these appliances. To

enable higher current the size of the conductor needs to be increased. And the
increased current results to more copper losses, poor voltage regulations and these
will result in lower system efficiency. This paper hence suggests an experimental
model for the use of PLC based power factor correction to increase the power factor
for the inductive load in the power line system

Running head: ELECTRICAL POWER