Quantum Computer Architectural Design

This paper discusses the roles of quantum computers in science and development, including the von Neumann architecture and trapped ion quantum computation. It also explores the Quantum 4004 and the future of quantum computing. Subject: Quantum Computing, Course Code: N/A, Course Name: N/A, College/University: N/A.

Running head: QUANTUM COMPUTER ARCHITECTURAL DESIGN
Quantum computer architectural design
Name of the Student
Name of the University
Author Note

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Abstract
Quantum Computing is making a great impact in the field of science and development in
today’s world. In this paper, a vivid description on the roles of the Quantum Computers has
been discussed. Quantum architecture is based upon the principle of the coherence of the
qubits and the computing is capable of acquiring crucial quantum information between the
quantum computers. The Quantum von Neumann architecture for trapped ions is discussed
here that uses memory multiplexing for full-scale quantum computation. The Quantum von
Neumann architecture for trapped ions in quantum computing has also been discussed in the
course of this assignment to highlight the importance of the trapped ions, as they are capable
of generating a high κ value. A description of the he Quantum 4004 has also been discussed.
It is based upon the classical Intel 4004 CPU. Conclusions from this report can be drawn as
Quantum computer will be able to shape the future of the technology despite being in its
initial stage of development.

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Table of Contents
Introduction................................................................................................................................3
Discussion..................................................................................................................................5
1. Quantum computer.............................................................................................................5
2. Quantum von Neumann architecture.................................................................................8
3. A quantum von Neumann architecture for trapped ion quantum computation................12
4. The Quantum 4004...........................................................................................................15
Summary..................................................................................................................................18
References................................................................................................................................21

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Introduction
From the early decades of the technological development, several equipment like that
of the transistors in the integrated circuits or the IC has expanded to almost a double in every
two year. There has been studies, which has discussed this type of an exponential growth, and
it aided in an exponential growth of the calculation power in the past (Beck, 2018). In the
early years of this century, the clock speeds of the integrated circuits grew exponentially also
but the problem with those clock speeds was that the clock speeds reached to the levels that
required cooling and the cooling of the clock speeds inherently limited the clock speeds
(DiVincenzo, 2000). To avoid this type of problem, there was necessity to maintain a steady
increase the in the exponential growth of the calculation power and that could only be
attained by decreasing the size of the transistors and incorporating multiple cores into the
integrated circuits (Van Meter, 2014). This decrease in the size of the transistors will make
them lead to a size of the atomic level which that is ultimate and from there, either one will
have to discover new techniques for computing the results or will have to be sufficed with the
lower increase in computation power over the time. This challenge regarding the speed of
computation is resolved with the help of Quantum Computation (Prince, 2014).
Quantum computation is the phenomenon of quantum mechanics that is attained
through the help of a series of computational techniques. Devices relying on these
computational techniques are known as the quantum computers. These computers are
different to that of the normal computers. The normal computers are not able to perform the
quantum functionalities and the algorithms, as they are composed of binary bits whereas the
quantum computers are composed of the quantum bits or qubits in simpler terms. These
qubits usually remain in the superposition of states (Yanofsky, Mannucci & Mannucci,
2008). An ideal quantum computer is generally known with the name of Quantum Turing

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Machine or (QTM). One of the major scientists in the field of quantum mechanics is Richard
Feynman. The concept of quantum computing is still at the early stages of development but
with relative efforts and technological developments, it is expected to bypass all the barriers
of computational activities in the field of quantum mechanics (Di Ventra, & Pershin, 2013).
Several valid experiments have been carried out in the past and are still being carried out to
get closer to the objectives of quantum computing. Along with the experiments several
theoretical researches are being carried on that is mostly being funded by the governments.
These quantum computers are mainly used for the specific purposes such as business, trade,
environmental and national security purposes.
On the basis of the computer architectures, about how the computer systems are to be
organized, designed and implemented are classified in the form of architectural style known
as the von Neumann architecture. This form of computer architecture has been derived from
the name of John Von Neumann who was the first person to enlist the requirements of the
electronic computer (Vlasov, 2000). His researches have a deep impact on the computer
systems of the present days. The computer systems that do not exhibit the same
characteristics as depicted by the computers architecture are known by following a non-Von
architecture.
The purpose of this assignment is to discuss the various aspects of the Quantum
computation based on the quantum architectural design. The areas related to the quantum
mechanics with the integration of the quantum mechanics has been discussed in this
assignment. A brief idea about the quantum computers have been discussed in this paper. The
von Neumann architecture has been outlined in this assignment along with the quantum von
Neumann architecture for a trapped ion quantum computation. The fourth section deals with
the idea of Quantum 4004. Ultimately, a summary of the whole assignment has also been
provided.

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Discussion
This section of the paper deals with the discussion of the quantum computers, the
quantum von-Neumann architecture, the quantum von-Neumann architecture for a trapped
ion quantum computation and the quantum 4004.
1. Quantum computer
A quantum computer can be described as a computer device that is based on the
structural configurations of the quantum mechanical system. One of the properties exhibited
by the quantum computers is the principle of superposition. They also depict their credibility
by solving relatively difficult tasks as compared to that of the classical computer devices. The
information stored in the quantum computers are in the form of two level mechanical systems
that are known by the name of quantum bits or qubits (Brandl, 2017). This qubits in relation
to the quantum mechanics are considered as the noise-induced de-coherence. Due to this
phenomenon of the qubits, the information storing capacity is limited. The Hilbert space
created by the isolation of the qubits are prone to that of the introduction of the error in the
computational activities through the quantum mechanical gate operations. The correction of
these errors should be done in order to avoid the further disputes in the quantum
computational activities (Imre & Balazs, 2013). These errors are known by the name of
Quantum Errors or QE and the techniques implemented to correct these errors are known as
the Quantum Error Correction or QEC mechanism. This mechanism is implemented in the
Quantum Computers as these helps in correcting the errors that generally creeps up due to de-
coherence and the multiple gate operations (Hirvensalo, 2013).
In computer science, the concept of the abstraction layers plays a huge part and can be
implanted in the quantum computers. The layers in quantum computing is generally of a total
of five in number. These layers are situated in the form of a stack that is one on top of the

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other (Chow et al., 2014). The bottommost layer of the layer system is comprised of the
physical layer that is responsible for all the physical gate operations. The layer situated right
above those layers is known with the name of virtual layer that supports the usage of the open
loop error cancellation (Childress & Hanson, 2013). The mechanism of the quantum error
correction is executed in the third layer. The fourth layer is named as the logical layer where
a substrate for quantum computations is structured. The fifth and the ultimate layer is known
with the name of Application layer that is known for providing an interactive interface to the
user who then gives the input. The application layer accepts the input and the quantum
computational activities are performed thereafter. Studies at the present are focusing on the
automation of the assembling and compilation of the sequence which are similar to that of the
assemblers and the compilers (Kloeffel & Loss, 2013). These researches and the studies are
taking place in the modern days to emphasize on the impact of the computing machines in the
present world. Thus it is evident that requirement of the quantum error correction is essential
in the correction of the stated errors.
An ideal quantum computer needs to follow the basic five characteristics in order to
exhibit itself successfully as a device capable of performing the quantum computations
(Humphreys et al., 2013). These attributes characterized by the quantum computers need to
contain well characterized qubits, they should have the ability to determine the state of the
qubits, they should have long de-coherence terms, they should have a universal state of the
quantum gates and should also exhibit a qubit oriented measurement capability. These five
characteristics are very much required for a computer system to be termed as the quantum
computers. Quantum electronic devices with trapped ions can be one of the possible devices
that can be termed as the quantum computers. Besides that, the devices containing quantum
dots in silicon and ultra cold atoms can also be potential quantum computers (Aaronson,
2013). It is challenging to find out a general architecture for the quantum computers such as

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the von Neumann architecture for a classical computer since the communication from one
qubit to another qubit has contrasting reflection from one technology to the other. Although
there have been several experiments regarding the advancement of the quantum
computational activities the area of quantum mechanics is still at the initial stage. For this,
several new researches and development of the existing modules are taking place worldwide.
The errors in the computational process of quantum computing arise from many
sources. From all these sources, there are two sources that can be highlighted as the main
sources of errors (Aasen et al., 2016). The first type of the error is known as the storage error
and this error mainly caused due to the noise produced from environment coupling in the
computers. The second type of the error is known as the de-coherence error and this error
mainly caused due to the unbalanced gate operations in the quantum field. The role of the
QEC is to correct these errors to produce a more accurate and effective result. The errors in
long Quantum Computations must be much below of the fault tolerant limit (Menicucci,
2014). This is essential for the QEC to be effective otherwise, the application of the QEC
would be meaningless if the level surpasses the fault tolerant limit. From this it is evident that
the errors in the during the quantum computational activities must be lowered to a significant
level in order to get greatly benefitted from the Quantum Error Correction mechanism
(Barends et al., 2014). For series of computation activities with just on processing zone the
coherence time of the qubits is required to be in proportion with that of the number of the
qubits in the quantum computer in order to maintain a constant error of the memory. That is,
the coherence time should increase with the increasing number of the qubits in the quantum
computation process in the quantum computers.
The difference in the computation speeds of varying architectural modules is heavily
dependent upon the complex algorithmic structures that are executed during the
computational process. Generally, Shors’s algorithm is used as ideal point of computational

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speed because it helps to allow the fast factorization of the large numbers (Saffman, 2016). A
number with Shor’s algorithm can be factorized if the number is of order N and has a binary
bit length of order n. Different architectural models can be implemented for the execution of
the Shor’s algorithm and these models can be easily connected to their execution time. To
achieve this process, it is very much required for a logical clock speed of the hardware that
states the number of operations can be implemented on the logical qubits at a particular rate
and this will indicate that quantum error correction is being executed in the logical operations
of the logical qubits (Raychev, 2015). One of the architectural model that is widely used in
the computational process of error correction mechanism is the Beckman Chari Devabhaktuni
Preskill or the BCDP model. This model requires the interaction between the just next
neighbors only. The model is known for using (5n+3) qubits to factorize a number that has a
binary bit length of order n and the time scales for the execution process is almost as ∼ 54n3 .
Another of such architectural model is the Neighbor only Two qubit gate Concurrent
architectural model or the NTC model. It is executed with the next neighbors only
interactions in a 2n2 qubit space and has a time scale as ∼ 20n2log2(n).
2. Quantum von Neumann architecture
In the context of the computer architectures about how the computer systems are
designed, structured and organized the role play of the von Neumann architecture is presented
as a reference of comparison. This is evident in most of the cases since almost every virtually
rooted computer is based on the structural plan of this architecture (Rédei, & Stöltzner,
2013). The name of this strong architectural model is derived from the name of John von
Neumann, who was the author of two important papers published in the year of 1945. These
two papers are contributed as Goldstine and von Neumann 1963 and von Neumann 1981.
Von Neumann was also a coauthor of a third paper in the year of 1946. He was the first
person to present with the requirements of a general purpose electronic computer. The idea of

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his papers stated the rigid effect on the development of such electronic machines (Lloyd,
2013).
In 1952, the construction of the EDVAC was possible due to the design of von
Neumann. Although the first computer of this genre was first constructed and operated at The
University of Manchester in Manchester, England and was named as Mark I. It had a 96 word
memory and a executed its first program in the year 1948. The time taken for the execution of
the instructions was 1.2 milliseconds that was an astonishing figure according to that period
of time (Van Meter & Horsman, 2013). In today’s world the execution time of the program
would have been 0.00083 millions of instructions per second using the MIPS terminology. In
contrast to the past, someof the supercomputers in the modern days is considered to run with
an excess speed of 1000 MIPS. However, these super computers as considered to be
following and based on the von Neumann architectural model to a large amount.
Many computers for several years have considered as the non-von Neumann
computers due to their configuration state or considered as to be following the minimum of
the von-Neumann architecture. It is being tried and efforts are being put for over the years to
break free from the old concept of following the traditional von Neumann architecture with a
purpose of being more productive and more usable as computers (Holmes, Kadin & Johnson,
2015). The requirements of the fifth generation of the computers demanded an evolution of
the architectural models and in addition to that, it also demanded that the hardware and the
software were set free from the bound of the von Neumann architectural model. However, it
is true that von Neumann architectural model plays an integral role in setting up of the basic
structures of the computer systems as it is the way it should work (Yamaoka et al., 2016). To
find out the present scopes for the computer designers and developers in contrast to the future
scope of the computer designers and the developers, emphasis on the on the critical

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understanding of the von Neumann architecture is required rather than just highlighting the
implications of the same architectural model (Chougule, Sen & Dongale, 2017)).
At first von Neumann, started discussing about the wide concept of the general
purpose computing machines. According to him, these computers consisted of mainly four
organs. These four organs came with the connection to the human operator. These four
organs are classified as arithmetic, memory, control and connection. In simpler words, it can
be said that a computing model consisted of an arithmetic unit, a logical unit, a memory and a
combination of the input and the output devices (Theis & Wong, 2017). According to von
Neumann the main objective of the computing systems were just not only to store data and
represent the results of the computation but also to store the data or the instructions that are
required for the computational activities. The computational procedure of the hardware was
considered to be connected to a hardware for the special purpose machines. For a general
purpose, one of the instruction is to be modifies in which they are being acted upon
(Kvatinsky et al., 2014). Therefore, it was necessary to encode the instructions into a form of
the numbers and store the data and the numbers simultaneously in the same memory. This
whole scenario is considered as a reference to the contribution of the von Neumann
architecture model for ideal computing machines. Later von Neumann defined the control
organ as the source, which would be able to store the coded instructions in the memory.
According to him, if the machine was able to differentiate between the number from its order
then the orders and data were able to reside in the same set of memory (Bochmann et al.,
2013). However, there is no dissimilarity between the number and order in memories. The
control counter, also known as the program counter is considered to be the carrier of the next
instruction and also of the word which is fetched to be executed. This happens according to
the control unit that is the process takes place according to what is treated as the data or an
order by the control unit.

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One of the disadvantages of the above mentioned process is that the instructions can
overwrite other instructions creating a self modified program. This overwriting of the
instructions were considered as one of the disadvantage for several years because the
requirement of debugging of the programs and the introduction of the new program snippets
in some parts of the program for some particular circumstances. Possibilities are there that the
developments and innovations in these fields will open a gateway for the possibilities
depicted by the above mentioned characteristic (Traversa et al., 2014). The main devotion of
von Neumann was in the field of the of designing the arithmetic unit which he declared as
one of the four organs of the general purpose computing machines. The further information
of this was not important according to the view of his organization and the future prospect
governing the developments in the fields of computing machines and devices. The main
abilities of the arithmewtic unit was bounded to the performance of some of the random
groups of the possible arithmetic operations. According to von Neumann, the inner economy
of the arithmetic unit is overseen by the sacrifice between the wish of the speed of the
operations and the desire for the non complexity and the cheapness of the machines (Lin et
al., 2015). It is interesting to know that this issue carried on for several more years and
dominated the design decisions. In modern days, it has been framed almost as a myth that the
cost of the hardware is not to be accounted as it is not so important.
The concepts put forward with the help of the von Neumann architecture were so
much significant that they proved to be the major source of foundation for the development
of the early computing machines and also for the systems that form a substantial part of the
modern days. Accordingly, from the above discussions of the above sub sections of this main
section it can be concluded that the von Neumann architectural model formed the basic
structural model of the modern day computing machines (Konar et al., 2016). The

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requirement of such architectural models has played an important part in the development of
the computing machines over the years and is still paving the way for a better future.
3. A quantum von Neumann architecture for trapped ion quantum computation
This portion of the discussion talks about how it can be possible to build a Quantum
von-Neumann architecture in a system of trapped ion.
The trapped ions were specifically chosen because these ions are capable of tapping a
technology that has a high κ value. It is recommended to use the operations that has already
be discussed and presented with high fidelity. The hardware of the quantum computer has
been covered in this section of discussion. Minimalism of the hardware is preferred over the
optimization especially for the scaling purposes of the quantum computers in the course of
higher abstraction layer tasks that contain attributes like the quantum error correction or the
quantum algorithms (Monroe & Kim, 2013). It is true that there is no fault tolerant quantum
computer until now so it cannot be expected from a first generation quantum computer to
work smoothly with great computational speeds. Accordingly, it can be said that the
computation speed is considered to hold less priority in the development of the architecture of
the computers. It is believed that if it is possible somehow to construct a fault tolerant
quantum computer and if the development process of that quantum computer is based upon
the principles of the Moores’s law, the relative speed of computational activities along with
the size with quantum memory will also increase in an exponential manner with the valuation
of the time scale (Harty et al., 2014).
The Quantum Charged Coupled Device or the QCCD is believed to be one of the
main devices that explain the working of the quantum von Neumann architecture for the
trapped ion (Lekitsch et al., 2017). In the principle of the QCCD, a segmented ion trap is used
to shift the ions to several designated positions on the trap by bringing in a modification in

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the confining axis of the DC voltages. This helps in turn to use one part of the systematic trap
as a quantum memory and the other part as the zone of processing or the quantum arithmetic
logical unit or QALU. The QCCD is a general concept for the stages of the Quantum
Computational activities and is also based upon the model of von Neumann architecture. It is
so as there are designated areas for the various DiVincenzo criteria and it is also helps in the
facilitation of the qubit movement along the radio frequency tracks of the divisional Paul trap
(Yung et al., 2014). QCCD is mainly used as the underlying principle of a quantum von
Neumann architectural model for the trapped ion Quantum Computational activities.
Ideas defining the mechanisms of the quantum error correction and the higher levels
of the architecture have been proposed for the principle of the QCCD. Nonetheless, it can be
seen that the trapped ions are responsible for providing with a large variations in the gate
operations and thus it is the reason for which the adaption at the layers of abstraction scheme
for a tapped ion is required in the computational stages of quantum computing (Balance et al.,
2016). The gates can be performed with the help of the utilization of the local radio frequency
fields, the global radio frequency fields or the optical fields. Even for the optical gates that
are entangled in nature, there are several other types of gates. Accordingly, the several
procedures for the shift of the efficient ions can be demonstrated also. The lowest abstraction
layer of the scheme is divided into two sections. The newly formed lowest level is called the
hardware layer, and just on top of the hardware layer, another layer known as the firmware
layer is implanted. This newly inserted layer contains the firmware of the system such as the
type of the quantum gates and the movement of the ions (Debnath et al., 2016). As the top
layers of the model have a very weak dependence of the hardware, they are not required to be
adapted.
The discussion of the quantum von Neumann architecture talks about the hardware
abstraction layer. As there is no prior knowledge about the exact performance of the

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hardware, the optimum quantum error correction mechanism cannot be detected for which it
is entirely useless to talk and discuss about the higher abstraction layers of the von Neumann
architectural model in this context (Devoret & Schoelkopf, 2013). There are several
challenges that the von Neumann architectural model can face with the trapped ions. Some of
these challenges can be stated as the pressure formed due to vacuum, de-coherence in the
quantum memory, iterative multiplexing to facilitate large quantum memories, the relative
quantum gates, read out along with initialization and the choice of the required qubits. These
challenges rising in the von Neumann architectural model can be mitigated using some of the
techniques such as the pressure formed due to vacuum can be mitigated by reducing the
collisions with the background gases (Schindler et al., 2013). For tackling the challenges
arising due to the coherence, it is not mandatory to completely eliminate the magnetic
gradients of the trapped ion in the computational stages of the quantum computing. If there is
prior knowledge about the magnetic storage at each storage point then it becomes easier to
calculate the phase evolution of all the qubits. Although, the techniques like the DFS or the
de-coherence free subspace encoding demands the same magnetic field for several number of
times. Thus, it is desirable but mandatory to have a high sense of homogeneity (Monroe et al.,
2014).
To bring in the required stability in the local oscillator, some ions of the quantum
computers are required to be sacrificed to act as a concise long term reference of frequency.
Although it is necessary to remove some ions from the QIP for the signal generation of the
clock, such a scheme is helpful in providing an allowance for the stabilization of the local
oscillator (Martinez et al., 2016). It will be helpful in enabling the use of the quantum
computer for atomic measurements of the atomic clock. If it is required to use a qubit
encoding scheme that is very much sensitive to the gradients of the magnetic fields such as
the DFS, even the shortest magnetic gradients along the axis of the trappings will be causing

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a different evolution of the phase in different ions over a period of long storages that may be
in hours or may be even in days. According to the linearity of the gradient, it is possible to
rotate the ion string somewhere in between the middle of the time of storage or in succession
after a certain period of time in the course of cancelling the effect of the gradient of the
magnetic field (Bohnet et al., 2016). Rotation of the ion string is affordable in the middle
stages by shifting the ions from the first arm to the second arm and then to the third arm to
finally bring it back to the first arm again.
The challenges in the quantum gates in ion trapping mainly arises due to the heating,
radio frequency or the optical drive fields, physical requirements for the gate operations,
pipelining and trap constraints (Tan et al., 2015). After the initialization stage is over the ions
are sent back to the other parts of the quantum computing device. After detection, the ions are
left to be cooled and initialization takes place in distinct zones before they are again enabled
to be used in the swap zone. Finally the selection of the ion species should be made on the
basis of the ground state qubit, long coherence time, wavelength, mass, mass ratio, no nuclear
spin and long lived D-state. These are some of the solutions that may be used to sort out the
challenges for the trapped ions in the quantum computers.
4. The Quantum 4004
This section deals with the discussion of the Quantum 4004. The quantum 4004 is the
architecture developed for the quantum computer. Quantum computer is different from the
outmoded computer in terms of computing principle. The quantum computer is operated on
the principle of the quantum mechanics. However, the process is lot more complex than the
traditional computing system. One of the leading challenges was to design an architecture
system that addresses this complexity while providing necessary speed for computation. In
order to draw the inspiration and obtaining the reference framework for design the classic

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Intel 4004 architecture was chosen. The design is known as the quantum 4004 architecture.
The original architecture was designed by the Intel in 1972 (Brandl, 2017).
The quantum 4004 is equipped with only single processor. The bit in the quantum
computing is known as qubit. It is the smallest measuring unit in the computing system. The
4004 model comes with the package of four qubit. In terms of memory, the 4004 model can
hold up to 32768 qubit ions. The speed of the processor depends on the number of bits
involved in the computing operation. The computing or the processor execution speed is
measured in μs. when single qubit operation is involved then the speed of the processor is 10
μs. however when double qubit operation is involved the speed is 20 μs.
As it has been already discussed that the architecture for the quantum 4004 is inspired
by the classical 4004 architecture, a lot of design principles have been incorporated in the
newer architecture. The first feature that has been integrated is the concept of abstraction
layers. It is one of the fundamental concepts of the computing system and hence it is also
applicable to the quantum computing as well. The architecture is design such that it helps the
processor to create abstraction layer for the each of the process through which the computer
works or the processor performs. The main idea behind the layer is to hide the
implementation details and only provide that much information that is necessary for the user
to interact with the system. This is one of the striking features of the quantum 4004
architecture that is incorporated for the classical 4004 architecture.
The next important feature of the quantum 4004 architecture is the concept of the
parallel computing. The concept is rather an interesting one and one of the essential features.
In order to execute quantum computing speed is an important feature. Now speed of the
processor can be increased in two ways either increasing the speed of the CPU clock or to
execute more than one instruction in a single time. Now the increase of CPU clock speed is

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sometime complicated and requires additional computing power and requires additional
computing memory which is a constraint for the quantum computing and also for the
quantum 4004 architecture (Shirriff, 2016). Hence, the concept of parallel computing is
integrated with the 4004 architecture. It is effective and efficient way to increase the speed of
execution of computing process in the quantum computing with the 4004 architecture.
As inferred from the above sections it is quite understandable that the Quantum 4004
is based on the von-Neumann architectural model for the trapped ions with the relation to the
structuring parameters that are according to the technical specifications of the Intel 4004.
According to the studies in the past about Intel 4004, it has been found that the Intel 4004
was consisted of only a single central processing unit, so it is clear that the working principle
of the Quantum 4004 will also be supported with a single quantum arithmetic logical unit.
The information is framed in the form of ion chains which are in an array of 4 qubits. It may
be beneficial for a 7 qubit Steane code to frame this mentioned architecture with the total of 7
qubits in an ion chain. Nevertheless, the first design should stand away from any kind of
bound or limitations imposed by the higher layers of the abstraction layer panel (O'Regan,
2016). Therefore it can be said that this design will prove to be an absolute fit for the Intel
4004 model consisting of 4 qubits. Each qubit in the memory zone is encoded with the DFS
mechanism for which one chain of the ions in the quantum memory can carry up to a total of
the 8 physical qubit ions. Thus it can be said that the Intel 4004 was structured with capability
of carrying 8 qubits or a single byte also.
As the proposed hardware can have coherence times with a longer period of interval
that is usually measured in hours or may be in days, it is not compulsory to design the
proposed hardware with a relatively fast gate speed. In context to the instruction time for the
executions to take place of a single or a double instruction cycle in the Intel 4004 that is
usually 10.8 μs, only one qubit operation is required to be executed in 10 μs and an

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associated operation of the gates must take place in almost 20 μs in the Quantum 4004
(Yadav, Dixit & Trivedi, 2017). The Intel 4004 was capable of accessing 4 Kilobytes of the
Random Access Memory (RAM) that is 32768 bits and accordingly the Quantum 4004
should also be able to accumulate 32768 qubits of ions. This figure would round off to 16384
qubits with the implementation of the DFS encoding.
The Quantum 4004 is an important example to depict the prototype that is optimized
for the implementation in a single hardware and that there is a technical possibility of a
quantum computer having ten thousand of qubits. To achieve this, it is very much required to
have a great understanding of the architectures and dedicated sections of the quantum
computational activities. With the mentioned criteria achieved the possibility of the quantum
architectures having a total of 10000 qubits is absolutely possible in the near future. One of
the limitations for implementing the Quantum 4004 is that even having the 32768 qubits of
ions, most of the traps will already be taken by the quantum memory for which there will be a
necessity of having bigger traps for the quantum computers. If the vacuum chamber of the
quantum computer has the capacity of a bigger area then that size is considered to be a
possible size (Chen, 2015). While working with the several number of qubits which will be
usually in millions, it will be required to discover innovative ways to generate the magnetic
fields with a very large volume of constant homogeneity or to find a path that will allow the
computational activities with the several number of qubits with a lesser homogeneity.
Summary
From the above sections, it can be concluded that the field of quantum computing is
an innovative field and is proving to be an emerging technology in the area of science and
development. Referring to the above sections, we develop a fair idea about the devising of the
Quantum Computers along with their impact in the present world. The development in field

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of the Quantum computational activities was due to the presence of some architectural
models. One of the prime architectural models upon which the whole concept of the Quantum
Computing is based upon is the von Neumann architecture. This architectural model has great
implications in the field of framing and structuring of quantum computing. There are some
limitations of this architectural model but those limitations are easily bypassed with the
formation of the new gateways of development.
The Quantum von Neumann architecture for a trapped ion quantum computation is
the area of the quantum computation that talks about the various aspects of an ion being
trapped inside the quantum memory. There are also several challenges in the trapping of the
ions in the quantum memory that can be solved with the help of few tools and dedicated
techniques. The list of challenges often can prove to be a serious factor of inhibition for the
trapping of ions in the quantum memory for the facilitation of the several genres of the
different quantum computational activities. In addition to that, the framework for the
implementation of the Quantum 4004 has also been discussed in the above sections. The
future prospect of the Quantum 4004 is very high as it is dedicated towards following the
same architecture as followed by the Intel 4004.
As per the knowledge that has been acquired from the discussion of the above
sections, it is evident that the quantum computers are still at the initial stages of development
and the usage of the quantum computers are not readily seen as they have not been
constructed in a full fledged manner. There are numerous roadblocks that are constantly
inhibiting the large scale production of such computers in the modern world. Diverting to the
context of classical computing, there is a much essentiality about the controlling of the
particles but the particles in the field of quantum computing requires an extra amount of
attention than those computing machines that can be easily controlled with the help of the
transistors.

20QUANTUM COMPUTER ARCHITECTURAL DESIGN
The qubits in the stages of quantum computing are extremely strong and powerful but
at the same time they can exhibit the opposite properties that they can be termed as weak
because they are prone to getting easily collapsed whenever efforts are made to have a look at
their proper working principle. They also are de-cohered at times for which they chucked to
their single sate or ground state of quantum superposition resulting the quantum computers to
convert themselves into an classical computer. Simply said, the attempt to survey the results
of the qubit calculations compels them to lose sensitive information that is undesired in the
context of computing. However, some of the measurements can surely be made to counter
these problems but those altercations must be performed in a decisively indirect approach.
With rigorous efforts and studies from the past, the modern day developers with the
assistance of the profound scientists have been able to come up with primary solutions of
designing a basic quantum computers that is capable of performing some of the calculations.
However, they have also agreed that it needs a lot of future efforts to successfully design a
quantum computer that can be used for meeting the needs of quantum computing.

21QUANTUM COMPUTER ARCHITECTURAL DESIGN
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