Boolean Algebra Simplification Example

This assignment presents a solved example showcasing the simplification of a Boolean expression, X’Y+XYZ’+Y’+XZ (Y+Y’). It begins by outlining the given expression and then meticulously applies Boolean algebra principles to simplify it step-by-step. The solution demonstrates various properties and rules of Boolean algebra, such as absorption, idempotence, and complementarity. Ultimately, the simplified expression is proven to be equal to 1, highlighting the effectiveness of Boolean simplification techniques in digital circuit design.

Running head: BOOLEAN ALGEBRA
Boolean algebra
Name of the student
Name of the University
Student Id
Subject code (ITC544)
Assignment 1: Data representation and digital logic
Author note

Page 1 of 7BOOLEAN ALGEBRA
Answer 1:
a)
Single precision IEEE 754 format- 0 01111110 10100000000000000000000
In this section, the first MSB (most significant bit) is the sign, the middle portion is the
exponent and the last portion is the mantissa.
Decimal conversion- 8.125 * 10^-1
b)
5-bit word- 0 1010
Signed magnitude- +10 (Most significant bit-0 [positive] rest 4 bits are magnitude)
One’s complement- 10101 (all the 0’s are replaced by 1 and vice-versa)
Two’s complement- 10110 (1 is added to the one’s complement)
Answer 2:
a)
This section will represent the hours of the clock in 5-bit binary form.
Magnitude Binary Clock pulse (p)
1 A B C D E High (+1)
00001
2 00010
3 00011
4 00100
5 00101
6 00110
7 00111
8 01000

Page 2 of 7BOOLEAN ALGEBRA
9 01001
10 01010
11 01011
12 01100
13 01101 Low (0)
14 01110
15 01111
16 10000
17 10001
18 10010
19 10011
20 10100
21 10101
22 10110
23 10111
24 11000
The timing diagram will supposedly use a 12-hour clock period. For 1-12 time on the
clock, the pulse will give +one value. For 13-24, the pulse will give zero value. To address the
requirements, the 12 am in the clock is considered as one, which will continue until the pulse
reaches 24. The door will open for 9 am (9) to 12 pm (12) and 1 pm (13) to 4 pm (16). In
addition, the binary bits will be represented by A B C D E to represent the required bits in the
logic diagram. The circuit will be made by the use of basic logic gates.
The logic diagram is:
A'BC'D'EP+A'BC'DE'P+A'BC'DEP+A'BCD'E'P=Q (For clock= +1)
A'BCD'EP’+A'BCDE'P’+A'BCDEP’+AB'C'D'E'=R (For clock=0)

Page 3 of 7BOOLEAN ALGEBRA
Fig: Logic diagram
(Source: Created by the author)
b)
X’Y+XYZ’+Y’+XZ (Y+Y’)
= X’Y+XYZ’+Y’+XZY+XZY’
= X’Y+XY (Z+Z’) +Y’+XZY’
=X’Y+XY+Y’+XZY’

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=Y+Y’+XZY’
=1+XZY’
=1 (PROVED)

Page 5 of 7BOOLEAN ALGEBRA
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