EN0705 - Computer Networks and Operating Systems

Added on - 21 Apr 2020

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Name, Student Number2016/7 KF7023 & EN0705 Network and OperatingSystemsFaculty of Engineering and EnvironmentKF7023 & EN0705 - Computer Networks andOperating SystemsAuthor:Student number:Year:2016/7Name, Student NumberKF7023 & EN0705 Network and Operating Systems
Name, Student Number2016/7 KF7023 & EN0705 Network and OperatingSystemsI.Evaluation ReportCISC/RISC Design Philosophies and OS IssuesAbstractThis paper looks at the RISC and CISC computer processor architectures in the context ofoperating system issues such as performance and architecture. RISC is an architecture thatuses simplified instructions to execute operations in a single clock cycle, while CISC is anarchitecture that aims at completing tasks in as few lines as is possible and so uses the MULTsystem which is a complex instruction, while RISC breaks down MULT into simpleinstructions. For this reason, RISC performs much faster (between 2 and 4 times) whencompared to CISC when running a program such as an Operating System instruction.Because of simplicity, RISC has an advantage of speed; it performs fast, and is cheaper andeasier to produce; but this also raises ethical issues as RISC focuses on performance and notprotection while leading to increased e-wastes as every new generation of RISC processorshave significantly large and better performance over previous generations. CISC makes microprogramming easy and does not require a complicated compiler; it also uses fewerinstructions for task execution. However, it has the limitation of speed; its comparativelymuch slower and complex because it constrains instructions as a subset of previousgenerations, leading to complex architectures. It can slow down an OS because differentinstructions need different clock times for their execution. Setting condition codes is requiredin CISC and these can take a lot of time, and have to be examinedBackgroundEach processor is built with an ability to execute a given set of instructions to perform alimited set of fundamental operations. The processor has an instruction set architecturenecessary for creating programs at the machine level to perform any logical and mathematicalcomputations. This instruction set is embedded within processor and serves as the bridgebetween the hardware and software. High level language is translated into machine levellanguage using a compiler. If there is an increase in the number of complex instructions in theprocessor instruction set, the processor working slows down because there is increasedcomplexity in instruction decoding; this also consumes more time. The most important factorthat impacts software and overall computer performance is the design of the processorinstruction set; it impacts how operating systems are designed and how they run on theName, Student NumberKF7023 & EN0705 Network and Operating Systems
Name, Student Number2016/7 KF7023 & EN0705 Network and OperatingSystemscomputer processor. This is due to the fact that all software applications and operatingsystems are programmed within the processor instruction set boundaries. So for everyprocessor, a unique instruction set is employed so that one processors’ machine languageprograms will not run on a different processor. Computer use processors to carry outcomputations; these CPUs have distinct design philosophies, namely RISC (ReducedInstruction Set Computer) and CISC (Complex Instruction Set Computer). The main goal ofthe CISC architecture is the completion of tasks in as few assembly lines as possible. Toachieve this, the processor hardware is built so it can understand and execute a series ofoperations; it comes prepared with a specific set of instructions (MULT). Upon execution, theMULT loads the 2 values into separate registers, multiplies that operation within theexecution unit, and stores the outcome in the appropriate register. In this way, CISCcompletes an entire multiplication process using a singe instruction. MULT directly operatesin the memory banks of computers and the programmer is thus not required to explicitly callany storing or loading instructions. In the RISC approach, only simple instructions that areexecutable in a single clock cycle are used, so the ‘MULT’ command described in CISCabove is divided into three commands that are separate; ‘LOAD’ that moves data to theregister from a memory bank, ‘PROD’ that finds two operand products located in theregisters, and ‘STORE’ that moves data to the memory banks from the register. CISC has afocus on hardware and can perform complex multi clock instructions (Blem, Menon &Sankaralingam, 2013). RISC on the other hand, has a greater focus on software and operatesin a single clock cycle to execute tasks. The operating systems are designed so as to make thebest use of the underlying processor architecture; its performance in terms of memoryaddressing and architecture (layering), as well as its implementation is directly impacted bythe processor it runs on. The performance of operating systems is also impacted by theprocessor architecture in the context of the ISA (instruction set architecture). A CISCprocessor has several specialized instructions though some are rarely used practically inoperating systems while a RISC processor simplifies things through the efficientimplementation only of the instructions that the operating system uses frequently; RISCimplements the less common operations as subroutines. This approach results in the extraprocessor execution time compensated for by their infrequent usage (Burgeret al., 2004).These design philosophies have their merits and demerits in terms of computer performanceand operating system architecture and performanceAdvantagesName, Student NumberKF7023 & EN0705 Network and Operating Systems
Name, Student Number2016/7 KF7023 & EN0705 Network and OperatingSystemsThe different architectures have their merits; CISC has advantages in micro programming;this becomes as easy to implement as assembly language with RISC. Further, microprogramming is far less expensive compared to hard wiring control units. CISC machineshave upward compatibility allowing new computers to run older programs as the newcomputer has a set of instructions contained in the earlier computers. It uses fewerinstructions for task implementation, an advantage when the main memory is slow. It doesnot require a complicated compiler since instruction sets for micro programs can be written tomatch up to high level languages.The RISC architecture has a number of advantages as well; its main advantage is speedbecause it has a simplified instruction set that enables super scalar pipelined design; thismakes them achieve between 2 and 4 times the CISC processor performance whencomparable semi conductor technology as well as similar clock speeds are used. RISCprocessors use significantly less chip space as well as other functions such as floating pointarithmetic units and memory management units; these can be placed in the same RISC chip,reducing space use and power consumption. More parts can thus be placed on the same waferchip, resulting in reduced cost of processor chips. RISC processors are far simple, comparedto corresponding CISC processors, and this makes their design quick. This implies theirdesign can make use of new technological advances when compared to CISC resulting inbigger performance leaps between processor generations.DisadvantagesThe CISC philosophy has problems; the chip hardware and instruction set for CISCprocessors have become more complex with every subsequent computer generation becauseit began with generations of processors contained in every new version as a subset. Because itworked based on the philosophy of storing as many sets of instructions as possible in memoryso that as little space as possible is wasted, they now have the disadvantage of havingdifferent instruction sets taking different amounts of clock time in execution, chiefly becauseof having long individual instructions of any length; this slows down machine performanceand operating system performance. The philosophy has many specialized instructions, butwhich are not frequently used, and their existence is not justified as operating systems usejust 20% of available instructions. Single codes n CISC are set as an instruction side effect;setting conditions take time and the code must be examined by programmers before they arechanged by subsequent instructions.Name, Student NumberKF7023 & EN0705 Network and Operating Systems
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