EN0705 - Computer Networks and Operating Systems - Desklib
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Added on 2020-04-21
EN0705 - Computer Networks and Operating Systems - Desklib
Added on 2020-04-21
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Name, Student Number 2016/7 KF7023 & EN0705 Network and Operating SystemsFaculty of Engineering and EnvironmentKF7023 & EN0705 - Computer Networks andOperating SystemsAuthor:Student number:Year:2016/7Name, Student Number KF7023 & EN0705 Network and Operating Systems
Name, Student Number 2016/7 KF7023 & EN0705 Network and Operating SystemsI.Evaluation ReportCISC/RISC Design Philosophies and OS IssuesAbstract This paper looks at the RISC and CISC computer processor architectures in the context of operating system issues such as performance and architecture. RISC is an architecture that uses simplified instructions to execute operations in a single clock cycle, while CISC is an architecture that aims at completing tasks in as few lines as is possible and so uses the MULTsystem which is a complex instruction, while RISC breaks down MULT into simple instructions. For this reason, RISC performs much faster (between 2 and 4 times) when compared to CISC when running a program such as an Operating System instruction. Because of simplicity, RISC has an advantage of speed; it performs fast, and is cheaper and easier to produce; but this also raises ethical issues as RISC focuses on performance and not protection while leading to increased e-wastes as every new generation of RISC processors have significantly large and better performance over previous generations. CISC makes microprogramming easy and does not require a complicated compiler; it also uses fewer instructions for task execution. However, it has the limitation of speed; its comparatively much slower and complex because it constrains instructions as a subset of previous generations, leading to complex architectures. It can slow down an OS because different instructions need different clock times for their execution. Setting condition codes is required in CISC and these can take a lot of time, and have to be examined Background Each processor is built with an ability to execute a given set of instructions to perform a limited set of fundamental operations. The processor has an instruction set architecture necessary for creating programs at the machine level to perform any logical and mathematicalcomputations. This instruction set is embedded within processor and serves as the bridge between the hardware and software. High level language is translated into machine level language using a compiler. If there is an increase in the number of complex instructions in theprocessor instruction set, the processor working slows down because there is increased complexity in instruction decoding; this also consumes more time. The most important factor that impacts software and overall computer performance is the design of the processor instruction set; it impacts how operating systems are designed and how they run on the Name, Student Number KF7023 & EN0705 Network and Operating Systems
Name, Student Number 2016/7 KF7023 & EN0705 Network and Operating Systemscomputer processor. This is due to the fact that all software applications and operating systems are programmed within the processor instruction set boundaries. So for every processor, a unique instruction set is employed so that one processors’ machine language programs will not run on a different processor. Computer use processors to carry out computations; these CPUs have distinct design philosophies, namely RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer). The main goal of the CISC architecture is the completion of tasks in as few assembly lines as possible. To achieve this, the processor hardware is built so it can understand and execute a series of operations; it comes prepared with a specific set of instructions (MULT). Upon execution, theMULT loads the 2 values into separate registers, multiplies that operation within the execution unit, and stores the outcome in the appropriate register. In this way, CISC completes an entire multiplication process using a singe instruction. MULT directly operates in the memory banks of computers and the programmer is thus not required to explicitly call any storing or loading instructions. In the RISC approach, only simple instructions that are executable in a single clock cycle are used, so the ‘MULT’ command described in CISC above is divided into three commands that are separate; ‘LOAD’ that moves data to the register from a memory bank, ‘PROD’ that finds two operand products located in the registers, and ‘STORE’ that moves data to the memory banks from the register. CISC has a focus on hardware and can perform complex multi clock instructions (Blem, Menon & Sankaralingam, 2013). RISC on the other hand, has a greater focus on software and operates in a single clock cycle to execute tasks. The operating systems are designed so as to make thebest use of the underlying processor architecture; its performance in terms of memory addressing and architecture (layering), as well as its implementation is directly impacted by the processor it runs on. The performance of operating systems is also impacted by the processor architecture in the context of the ISA (instruction set architecture). A CISC processor has several specialized instructions though some are rarely used practically in operating systems while a RISC processor simplifies things through the efficient implementation only of the instructions that the operating system uses frequently; RISC implements the less common operations as subroutines. This approach results in the extra processor execution time compensated for by their infrequent usage (Burger et al., 2004). These design philosophies have their merits and demerits in terms of computer performance and operating system architecture and performanceAdvantages Name, Student Number KF7023 & EN0705 Network and Operating Systems
Name, Student Number 2016/7 KF7023 & EN0705 Network and Operating SystemsThe different architectures have their merits; CISC has advantages in micro programming; this becomes as easy to implement as assembly language with RISC. Further, micro programming is far less expensive compared to hard wiring control units. CISC machines have upward compatibility allowing new computers to run older programs as the new computer has a set of instructions contained in the earlier computers. It uses fewer instructions for task implementation, an advantage when the main memory is slow. It does not require a complicated compiler since instruction sets for micro programs can be written tomatch up to high level languages. The RISC architecture has a number of advantages as well; its main advantage is speed because it has a simplified instruction set that enables super scalar pipelined design; this makes them achieve between 2 and 4 times the CISC processor performance when comparable semi conductor technology as well as similar clock speeds are used. RISC processors use significantly less chip space as well as other functions such as floating point arithmetic units and memory management units; these can be placed in the same RISC chip, reducing space use and power consumption. More parts can thus be placed on the same waferchip, resulting in reduced cost of processor chips. RISC processors are far simple, compared to corresponding CISC processors, and this makes their design quick. This implies their design can make use of new technological advances when compared to CISC resulting in bigger performance leaps between processor generations. Disadvantages The CISC philosophy has problems; the chip hardware and instruction set for CISC processors have become more complex with every subsequent computer generation because it began with generations of processors contained in every new version as a subset. Because itworked based on the philosophy of storing as many sets of instructions as possible in memoryso that as little space as possible is wasted, they now have the disadvantage of having different instruction sets taking different amounts of clock time in execution, chiefly because of having long individual instructions of any length; this slows down machine performance and operating system performance. The philosophy has many specialized instructions, but which are not frequently used, and their existence is not justified as operating systems use just 20% of available instructions. Single codes n CISC are set as an instruction side effect; setting conditions take time and the code must be examined by programmers before they are changed by subsequent instructions. Name, Student Number KF7023 & EN0705 Network and Operating Systems
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